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Multicore

  • The Amazing Diversity of the SoC Conference

    Although I attend a number of conferences and tradeshows each year, most of these are rather EDA-centric. But last week I was in Irvine for the eighth annual International System-on-Chip (SoC) Conference. It is a fairly small event -- more like a workshop in some ways -- with a single track over its...
    Posted to Functional Verification (Weblog) by tomacadence on Mon, Nov 8 2010
  • EDA Workshop Debate Erupts Over Parallel Programming

    The Electronic Design Processes (EDP) workshop may be a small, technical, IEEE-sponsored event, but that didn't stop a lively debate over the feasibility of parallel processing from erupting last week. The debate comes as EDA vendors, including Cadence, are working hard to port their software to...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Apr 12 2010
  • DAC Report: GPUs Or Multicore For EDA Applications?

    The Wednesday keynote speech at the Design Automation Conference offered a strong argument for general-purpose graphical processing units (GPGPUs) as the best way to accelerate EDA and other compute-intensive applications. But whether GPGPUs will prove to be a better solution than more conventional multicore...
    Posted to Industry Insights (Weblog) by rgoering on Fri, Jul 31 2009
  • Intel's Wind River Acquisition - New Help For Multicore SoCs?

    Intel’s recent purchase of Wind River Systems is an important move that could have a significant impact on embedded systems design. One possible outcome is better support for multicore system-on-chip (SoC) development. Intel’s $884 million purchase of Wind River is part of the semiconductor...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jun 10 2009
  • Porting EDA Applications to Multicore - Part 3

    It’s easier to build a multi-threaded application from the ground up than it is to go back and rewrite legacy code – but multi-threading still raises a number of tough challenges. The Cadence Space-Based Router is a case in point. Previous posts in this series looked at the challenges involved...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jun 3 2009
  • Porting EDA Applications To Multicore -- Part 2

    As noted in part one of this blog series, porting the Encounter Digital Implementation System (EDI) to multicore platforms was a challenging task. That’s no less true for Cadence’s efforts to parallelize the Virtuoso Spectre Circuit Simulator, although the challenges were somewhat different...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Apr 30 2009
  • Porting EDA Applications To Multicore -- Part 1

    The EDA industry is gearing up for what may be its largest retooling ever – retrofitting or rewriting applications to run on next-generation multicore platforms. An inside look at how Cadence ported the Encounter Digital Implementation System (EDI) to parallel processing illustrates some of the...
    Posted to Industry Insights (Weblog) by rgoering on Tue, Apr 28 2009
  • Video Demo: Spice 2.0 - The ABCs of APS

    Designers have had ubiquitous access to powerful SMP/multicore systems for years but no analog / mixed-signal solution that could fully leverage them. And when dealing with large designs, fastspice and the accuracy loss it induced was often the only recourse. APS represents a new era for spice simulators...
    Posted to Custom IC Design (Weblog) by AMSamirj on Wed, Feb 18 2009
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