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12 Hot EDA Topics – 78 DAC Demo Sessions
Whatever your role in the chip or system design process, there is probably a Cadence demo geared to your interests at the Design Automation Conference ( DAC 2012 ) June 3-7 in San Francisco. Cadence has three demo suites at its booth (#1930) and is running one-hour demos from 10:00 am to 5:00 pm Monday...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, May 24 2012
Managing Inherited Connections with CPF in Virtuoso
Let's assume you are managing a schematic-driven top level design in Virtuoso and you want to import a digital block Verilog netlist into Virtuoso. This is a very common use model in mixed-signal implementation. While the Layout Database is saved in Open Access (OA), the optimized Verilog netlist...
Posted to
Mixed-Signal Design
(Weblog)
by
AndreasLenz
on Wed, May 23 2012
A Quick Tutorial on Managing ECOs Using Pcells in Mixed Signal Designs
The purpose for creating a Pcell is to automate the creation of data. Pcells should be designed as standalone entities, independent of the environment in which they are created and independent of the variety of environments in which you or someone else might want to use them. An environment can react...
Posted to
Mixed-Signal Design
(Weblog)
by
paragb
on Wed, May 16 2012
Free DAC Lunches: Custom/Analog Variability, ARM Low Power Processors in Mixed-Signal Designs
There is such a thing as a free lunch - if you're at the 49th Design Automation Conference (DAC) in San Francisco June 3-7. Cadence is sponsoring two lunches at which you can learn about two important technology topics - custom/analog variability, and the use of ARM processors in low-power, mixed...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, May 14 2012
Low-Power Design? Brian Bailey Gets It
Hats off to Brian Bailey! If you haven't been following his EDA Designline Power Series on eetimes.com you have been missing out. Throughout April, he's been running a pretty comprehensive series of editorials, opinion pieces and contributed articles on the subject of low power design. As he...
Posted to
Low Power
(Weblog)
by
Pete Hardee
on Wed, May 2 2012
DVCon 2012 Verification Paper Archive – UVM, Low Power, Mixed Signal and More!
In late April, a wealth of information on IC functional verification became available at the DVCon web site . Both papers and slides are now available for dozens of high-quality presentations given at the DVCon 2012 conference, which was held Feb. 27-March 1, 2012 in Santa Clara, California. You can...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, May 1 2012
What is Digitally Assisted Analog Design?
Mixed-signal applications are among the fastest growing segments in the electronics and semiconductor industry. Applications in mobile communication, networking, power management, automotive, medical, imaging, safety and security require a very high integration of analog and digital functionality at...
Posted to
Mixed-Signal Design
(Weblog)
by
QiWang
on Mon, Apr 30 2012
DVCon 2012: Bringing Continuous Domain into SystemVerilog Covergroups
On the last day of February 2012, I presented a proposal at the DVCon 2012 Conference to extend SystemVerilog to support a real data type in coverpoint objects in order to facilitate mixed-signal verification for functional coverage. The paper, titled “ Bringing Continuous Domain into SystemVerilog...
Posted to
Mixed-Signal Design
(Weblog)
by
PrabalB
on Fri, Mar 30 2012
On-Line Presentation: 20nm Design Challenges, and a Look Ahead to 14nm
The Common Platform Technology Forum held March 14 in Santa Clara, California, provided an updated look at process technology, design challenges, and ecosystem collaboration at 28nm and below. Much of the content is available throughout 2012 as part of a Virtual Technology Forum . Following is a report...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Mar 19 2012
DVCon Paper: UVM-MS Brings Metric-Driven Verification to Mixed-Signal SoCs
Nearly all systems-on-chip (SoCs) are mixed-signal, and they must all be verified. While digital verification is heavily automated, analog verification is still a manual process, making mixed-signal verification extremely challenging. Can we bring digital verification technology, such as metric-driven...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Mar 12 2012
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