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Mixed-Signal,DAC,mixed signal,Industry Insights
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Designer View – Using Metric-Driven Verification for Mixed-Signal IP
Can digital verification techniques such as verification planning, coverage metrics, and assertion checking be applied to the analog/mixed-signal world? Yes, according to Pierluigi Daglio, analog verification engineer at STMicroelectronics. In a recorded presentation at the Cadence web site, he shows...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Aug 29 2012
Designer View – Automating Analog Design with Intent Capture
Analog design is almost entirely a manual effort, and that needs to change, according to Pierluigi Daglio, analog verification engineer at STMicroelectronics. In a recorded presentation at the Cadence web site, Daglio shows how analog/mixed-signal constraint capture and propagation can be automated,...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Aug 15 2012
Panel: Integrating Low-Power ARM Processors into Mixed-Signal Designs
Mixed-signal chip designs with embedded digital signal processing are becoming more and more commonplace these days. How can you bring low-power processors, such as the ARM Cortex-M0 , into such designs quickly and efficiently? A lunch panel discussion at the recent Design Automation Conference (DAC...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Jun 20 2012
Mixed-Signal Methodology Guide Sets New Directions for SoCs
Nearly all systems-on-chip (SoCs) these days are mixed-signal, with increasingly complex analog/mixed-signal (AMS) IP blocks. Meanwhile, analog blocks increasingly contain digital control logic. Yet analog and digital design are still done in relative isolation, using very different methodologies and...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, May 30 2012
12 Hot EDA Topics – 78 DAC Demo Sessions
Whatever your role in the chip or system design process, there is probably a Cadence demo geared to your interests at the Design Automation Conference ( DAC 2012 ) June 3-7 in San Francisco. Cadence has three demo suites at its booth (#1930) and is running one-hour demos from 10:00 am to 5:00 pm Monday...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, May 24 2012
Free DAC Lunches: Custom/Analog Variability, ARM Low Power Processors in Mixed-Signal Designs
There is such a thing as a free lunch - if you're at the 49th Design Automation Conference (DAC) in San Francisco June 3-7. Cadence is sponsoring two lunches at which you can learn about two important technology topics - custom/analog variability, and the use of ARM processors in low-power, mixed...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, May 14 2012
DAC Panel: Users Describe Mixed-Signal Verification Challenges, Solutions
Should analog/mixed-signal verification be more like digital verification, with separate verification teams, a methodology like the Universal Verification Methodology (UVM), and metric-driven verification (MDV)? Yes, according to three mixed-signal engineers at a panel discussion at the Cadence EDA360...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Jun 13 2011
Two New DAC Panels: 20nm Design and Mixed-Signal Verification
Two Design Automation Conference panels that you probably haven't heard off address two of the hottest issues in electronic design today. One panel focuses on 20nm design challenges, and the other tackles the perennially tough topic of mixed-signal verification. Both are free and organized by Cadence...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, May 31 2011
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