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Low-Power ,mixed signal

  • Mixed-signal and Low-power Demo -- Cadence Booth at DAC

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    Posted to Low Power (Weblog) by QiWang on Fri, May 31 2013
  • Packed House Expected for Cadence Low-Power Technology Summit

    It looks like it might be standing room only for latecomers to the Low-Power Technology Summit at Cadence headquarters building 10 auditorium this Thursday (18 October). Registration has been very strong. I'm expecting a great day -- we have a full agenda covering multiple aspects of low-power design...
    Posted to Low Power (Weblog) by Pete Hardee on Tue, Oct 16 2012
  • Mixed Signals from European Low-Power Designers

    Early summer is a good time to visit Europe. I was there for the first couple of weeks in July, before most of Europe disappears on vacation. I spent my time mainly with customers in Germany, Ireland and the UK. It's not the weather that makes it a good time to visit - while it was nice in Germany...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Jul 25 2012
  • What’s Hot for Mixed-Signal At DAC?

    Analog/mixed-signal design is a hot topic at the Design Automation Conference! At DAC 2012 at San Francisco's Moscone Center next week (June 4-7), you can keep up with the latest developments in mixed-signal design methodology, including design, implementation and verification. You will find it is...
    Posted to Mixed-Signal Design (Weblog) by QiWang on Thu, May 31 2012
  • What’s Cool for Low-Power at DAC?

    Low-power design promises to be a key theme of the Design Automation Conference once again! At DAC 2012 at San Francisco's Moscone Center next week (June 4-7), if you need to cover design, implementation and verification of this important subject, there's a lot to choose from at Cadence's...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, May 30 2012
  • Low-Power Design? Brian Bailey Gets It

    Hats off to Brian Bailey! If you haven't been following his EDA Designline Power Series on eetimes.com you have been missing out. Throughout April, he's been running a pretty comprehensive series of editorials, opinion pieces and contributed articles on the subject of low power design. As he...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, May 2 2012
  • Cadence Customers to Showcase Advanced Low-Power Designs at CDNLive!

    CDNLive! Silicon Valley, taking place at the DoubleTree Hotel in San Jose, CA next week from March 13-14, 2012, brings together Cadence technology users, developers, and industry experts to network, share best practices on critical design and verification issues, and discover new techniques for realizing...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Mar 7 2012
  • UVM: "Everything that Can be Invented Has Been Invented" Not True!

    Much like Charles Duell's famous 1899 quote**, the notion that the Universal Verification Methodology ( UVM ) is the be-all and end-all of verification methodology is an urban legend. The new Advanced Verification Topics book dispells this myth with five topics that describe methodology layers that...
    Posted to Functional Verification (Weblog) by Adam Sherilog on Thu, Jan 26 2012
  • Webinar Report: Power-Aware Mixed-Signal Verification

    Most of the discussion about low-power design techniques has focused on digital circuits. However, nearly all systems-on-chip (SoCs) are mixed-signal, and the way in which analog and digital circuitry interact has a huge impact on overall power consumption. Thus, low power (or "power aware"...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jan 25 2012
  • Digital Centric Mixed-Signal Dynamic Power Verification – Bringing It All Together

    This is the final posting in a series of blogs on dynamic power management in digital-centric mixed-signal verification environments. In this post, I will talk about concepts behind digital-centric mixed-signal verification (DMSV). My previous blogs covered some of the following topics: 1. Basics of...
    Posted to Low Power (Weblog) by Neyaz on Tue, Oct 19 2010
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