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Low-Power ,CPF,low-power design
2012 predictions
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New Incisive Low-Power Verification for CPF and IEEE 1801 / UPF
On May 7, 2013 Cadence announced a 30% productivity gain in the June 2013 Incisive Enterprise Simulator 13.1 release . Advanced debug visualization, faster turn-around time, and the extension of eight years of low-power verification innovation to IEEE 1801/UPF are the key capabilities in the release...
Posted to
Low Power
(Weblog)
by
Adam Sherilog
on Tue, May 7 2013
Low-Power Design Case Studies: 15 CDNLive! Papers So Far This Year
CDNLive! is back with a bang in 2012, with very strong support from the Cadence user community worldwide. We're three-quarters the way through the events at the time of writing -- you can see the whole program on www.cadence.com at the CDNLive! 2012 Worldwide page. Proceedings are published so far...
Posted to
Low Power
(Weblog)
by
Pete Hardee
on Mon, Sep 17 2012
What’s Cool for Low-Power at DAC?
Low-power design promises to be a key theme of the Design Automation Conference once again! At DAC 2012 at San Francisco's Moscone Center next week (June 4-7), if you need to cover design, implementation and verification of this important subject, there's a lot to choose from at Cadence's...
Posted to
Low Power
(Weblog)
by
Pete Hardee
on Wed, May 30 2012
Low-Power Design? Brian Bailey Gets It
Hats off to Brian Bailey! If you haven't been following his EDA Designline Power Series on eetimes.com you have been missing out. Throughout April, he's been running a pretty comprehensive series of editorials, opinion pieces and contributed articles on the subject of low power design. As he...
Posted to
Low Power
(Weblog)
by
Pete Hardee
on Wed, May 2 2012
Cadence Customers to Showcase Advanced Low-Power Designs at CDNLive!
CDNLive! Silicon Valley, taking place at the DoubleTree Hotel in San Jose, CA next week from March 13-14, 2012, brings together Cadence technology users, developers, and industry experts to network, share best practices on critical design and verification issues, and discover new techniques for realizing...
Posted to
Low Power
(Weblog)
by
Pete Hardee
on Wed, Mar 7 2012
Low Power Design in 2011 and Predictions for 2012
It's that time of year again - winding down towards the end of the year, taking some time with the family, and looking forward to returning refreshed for a new year. So what was the big news for low power in 2011 and what do we have to look forward to in 2012? It's sometimes humbling to look...
Posted to
Low Power
(Weblog)
by
Pete Hardee
on Thu, Dec 22 2011
Si2 Interoperability Guide V2.0 Available for Download
Recently, the Silicon Integration Initiative (Si2) announced the availability of the Interoperability Guide for Power Format Standards V2.0 . This is an important milestone of power format interoperability between IEEE 1801-2009 and the Common Power Format (CPF). This update was triggered by the Si2's...
Posted to
Low Power
(Weblog)
by
QiWang
on Mon, Oct 31 2011
Cadence Low Power Guru Wins Si2’s Distinguished Service Award
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Posted to
Low Power
(Weblog)
by
Pete Hardee
on Fri, Oct 21 2011
Another Expert’s View on Power Intent and Hierarchy
Normal 0 false false false EN-US X-NONE X-NONE /* Style Definitions */ table.MsoNormalTable {mso-style-name:"Table Normal"; mso-tstyle-rowband-size:0; mso-tstyle-colband-size:0; mso-style-noshow:yes; mso-style-priority:99; mso-style-qformat:yes; mso-style-parent:""; mso-padding-alt...
Posted to
Low Power
(Weblog)
by
Pete Hardee
on Wed, Sep 21 2011
An Expert’s View on Power Formats and Methodology
In the last five years since the introduction of power formats, using a side file to describe power intent such as power domains, power modes and associated interface logic has become the mainstream low power design methodology. This marks great progress toward automating complex low power design techniques...
Posted to
Low Power
(Weblog)
by
Pete Hardee
on Wed, Aug 24 2011
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