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Low power ,low-power design

  • Cadence Customers to Showcase Advanced Low-Power Designs at CDNLive!

    CDNLive! Silicon Valley, taking place at the DoubleTree Hotel in San Jose, CA next week from March 13-14, 2012, brings together Cadence technology users, developers, and industry experts to network, share best practices on critical design and verification issues, and discover new techniques for realizing...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Mar 7 2012
  • Low Power Design in 2011 and Predictions for 2012

    It's that time of year again - winding down towards the end of the year, taking some time with the family, and looking forward to returning refreshed for a new year. So what was the big news for low power in 2011 and what do we have to look forward to in 2012? It's sometimes humbling to look...
    Posted to Low Power (Weblog) by Pete Hardee on Thu, Dec 22 2011
  • Low Power Marketing Hype – And What They Don’t Tell You

    Here in the USA, we're just back from the Thanksgiving holiday. This year, I got caught up in "Black Friday," which is the day after Thanksgiving, and one of the biggest shopping days of the year, especially for consumer electronics. I'm afraid to say I was convinced enough by some...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Nov 30 2011
  • Si2 Interoperability Guide V2.0 Available for Download

    Recently, the Silicon Integration Initiative (Si2) announced the availability of the Interoperability Guide for Power Format Standards V2.0 . This is an important milestone of power format interoperability between IEEE 1801-2009 and the Common Power Format (CPF). This update was triggered by the Si2's...
    Posted to Low Power (Weblog) by QiWang on Mon, Oct 31 2011
  • Cadence Low Power Guru Wins Si2’s Distinguished Service Award

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    Posted to Low Power (Weblog) by Pete Hardee on Fri, Oct 21 2011
  • Another Expert’s View on Power Intent and Hierarchy

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    Posted to Low Power (Weblog) by Pete Hardee on Wed, Sep 21 2011
  • Low-power Keeps Gate-Level Simulation Forever Young

    Ann Mutschler blogged in the Low-Power Engineering Community that gate-level simulation is coming back, driven in part by low-power verification needs. “In a small sense, what’s old is new” may actually be the biggest understatement in her blog. Ann attributes the observation to Cadence’s...
    Posted to Low Power (Weblog) by Adam Sherilog on Thu, Sep 8 2011
  • An Expert’s View on Power Formats and Methodology

    In the last five years since the introduction of power formats, using a side file to describe power intent such as power domains, power modes and associated interface logic has become the mainstream low power design methodology. This marks great progress toward automating complex low power design techniques...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, Aug 24 2011
  • Low Power Design -- Alive and Well at DAC

    Low power design was undoubtedly one of the themes of DAC this year -- especially at the Cadence booth. We drew lively interest on the DAC floor with our low power demo station, which was continuously busy especially on the free Monday. We were showing a new demo explaining how advanced low power techniques...
    Posted to Low Power (Weblog) by Pete Hardee on Tue, Jun 14 2011
  • GUC User Presentation at DAC: How to Do Low Power Design

    Power was clearly a hot topic at the recent Design Automation Conference (DAC). Many companies demonstrated their unique tool capabilities to address power issues at different abstraction levels. However, we saw very few presentations that offered a user perspective on how they do low power designs and...
    Posted to Low Power (Weblog) by QiWang on Mon, Jun 13 2011
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