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Low Power,mixed signal

3D IC
3D-IC
AMS
AMS Designer
Analog
Analog Simulation
analog/mixed-signal
ARM
assertions
Cadence
CDN Live
CDNlive
CDNLive proceedings
CDNLive!
Common Power Format
Conformal
Cortex-M0
coverage
CPF
custom
custom/analog
DAC
DAC 2012
DAC demo suites
DAC lunch
DAC lunches
dac2012
debugging
demo suites
Design Automation Conference
design implementation
digital implementation
digitally assisted analog
digitally-assisted analog
DVCon
DVCon 2012
DVFS
Dynamic power
ECO
EDA Designline
EE Times
emulation
Encounter
Encounter digital Implementation system
Encounter Digital Implementation System 8.1
Encounter Power System
Encounter Test
energy harvesting
energy management
EPS
ESL
Functional Verification
IC 6.1
IEEE 1801
in-design
Industry Insights
IP
IR drop
low-power
low-power design
metric-driven
mixed signal design
Mixed signal physical implementation
mixed signal solution
Mixed-Signal
mixed-signal verification
MSV
NXP
parasitic-aware design
parasitics
PCB
Power
power analysis
power gating
power management
power shutoff
power shut-off
power-aware
PSL
PSO
RF
RNM
signoff
Silicon Realization
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SoC
SoCs
SPICE
SVA
SystemVerilog
TLM
UPF
UVM
UVM-MS
verification
Verilog
Verilog-A
Virtuoso
webinar
wreal

GTC Panel: Getting Best Use From Older IC Process Nodes

Time for a mainstream revolution? That was the title of a lively panel discussion at the Global Technology Conference ( GTC ) Aug. 30. Panelists noted that there's still a lot of activity at 65nm and above. They discussed why this is true, whether mature nodes can be retrofitted with new capabilities...

Posted to Industry Insights (Weblog) by rgoering on Mon, Sep 5 2011
Mixed-Signal Physical Design Implementation Made Easy

Getting a complex mixed-signal design assembled and completely analyzed for mask design is a huge challenge today. The IPs are complex and too many decisions need to be made to meet design budgets. All this is not possible with anything less than a fully automated, front-to-back mixed-signal design solution...

Posted to Mixed-Signal Design (Weblog) by RajendraPratap on Thu, Jun 16 2011
CPF Low Power Simulation with Analog and Mixed-Signal Design (CPF-AMS)

We have been talking about low power simulation and the Common Power Format (CPF) for five or six years now. It’s become popular in most digital designs thanks to a mature methodology and design flow. However, more and more SoC designs are coming up with mixed-signal content. How will low power...

Posted to Mixed-Signal Design (Weblog) by Qingyu Lin on Mon, May 23 2011
Q&A: Jim Hogan Identifies Custom/Analog Challenges and Solutions

Jim Hogan has been a mover and shaker in the EDA industry since long before the term "EDA" was invented. Today a well-known independent venture capitalist, Hogan previously ran both R&D and marketing for the Cadence Virtuoso product, and he knows the custom/analog world well. He's invested...

Posted to Industry Insights (Weblog) by rgoering on Sun, Mar 20 2011
Virtuoso IC6.1.5: Software and Fine Red Wine

Software, like fine red wine, can get better with age as well -- but it requires constant advancements to remain a vibrant contributor. Such is the case with the Virtuoso IC6.1.5 custom/analog technology release , which delivers on the promise of Silicon Realization with capabilities that maintain design...

Posted to Custom IC Design (Weblog) by NewYorkSteve on Mon, Mar 14 2011
Advanced Mixed-Signal Designs Demand a Unified Methodology

Mobile, automotive, consumer and medical applications require the productive realization of large and complex mixed-signal systems in silicon, and they must be on time and within budget constraints. Process capabilities make it possible to implement analog and RF circuits in CMOS technology at advanced...

Posted to Mixed-Signal Design (Weblog) by nizic on Sun, Feb 6 2011
Tackling your Greatest Chip Design Challenges with the Cadence Digital End-to-End Flow

It hasn't been that long, but do you recall your new year's resolution? Eat healthier? Have more work-life balance? Exercise more? Or, what about, "create a chip that is so compelling and useful, it blows everybody's socks off in the semiconductor industry?" If the latter is your...

Posted to Digital Implementation (Weblog) by Design4Life on Mon, Jan 31 2011
CDNLive! Spotlights Silicon Realization – What’s That All About?

As CDNLive! Silicon Valley opens this morning (Tuesday, Oct. 26), Silicon Realization will be a major theme. So what is Silicon Realization, and how does it differ from EDA as we've known it thus far? Here's a very quick overview, followed by a link to a new whitepaper for those who would like...

Posted to Industry Insights (Weblog) by rgoering on Tue, Oct 26 2010
Digital Centric Mixed-Signal Dynamic Power Verification – Bringing It All Together

This is the final posting in a series of blogs on dynamic power management in digital-centric mixed-signal verification environments. In this post, I will talk about concepts behind digital-centric mixed-signal verification (DMSV). My previous blogs covered some of the following topics: 1. Basics of...

Posted to Low Power (Weblog) by Neyaz on Tue, Oct 19 2010
Panelists: How to Manage Power for Mixed-Signal and RF

Nearly all of the discussion about low-power design has been on the digital side - but many of the problems are in the analog/mixed-signal and RF domains. I was thus pleased to see that the EE Times Advances in Power Management on-line conference Sept. 16 had a panel on this topic, with speakers from...

Posted to Industry Insights (Weblog) by rgoering on Mon, Sep 20 2010

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Low Power,mixed signal

GTC Panel: Getting Best Use From Older IC Process Nodes

Mixed-Signal Physical Design Implementation Made Easy

CPF Low Power Simulation with Analog and Mixed-Signal Design (CPF-AMS)

Q&A: Jim Hogan Identifies Custom/Analog Challenges and Solutions

Virtuoso IC6.1.5: Software and Fine Red Wine

Advanced Mixed-Signal Designs Demand a Unified Methodology

Tackling your Greatest Chip Design Challenges with the Cadence Digital End-to-End Flow

CDNLive! Spotlights Silicon Realization – What’s That All About?

Digital Centric Mixed-Signal Dynamic Power Verification – Bringing It All Together

Panelists: How to Manage Power for Mixed-Signal and RF