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Low Power,PSO,power-aware

  • What’s Cool for Low-Power at DAC?

    Low-power design promises to be a key theme of the Design Automation Conference once again! At DAC 2012 at San Francisco's Moscone Center next week (June 4-7), if you need to cover design, implementation and verification of this important subject, there's a lot to choose from at Cadence's...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, May 30 2012
  • Digital Centric Mixed-Signal Dynamic Power Verification – Bringing It All Together

    This is the final posting in a series of blogs on dynamic power management in digital-centric mixed-signal verification environments. In this post, I will talk about concepts behind digital-centric mixed-signal verification (DMSV). My previous blogs covered some of the following topics: 1. Basics of...
    Posted to Low Power (Weblog) by Neyaz on Tue, Oct 19 2010
  • Error Detection for Controlled Voltage Sources and Voltage Scaling

    This posting is part of a series of blogs on dynamic power management in digital-centric mixed-signal verification environments. In this post, I will cover error detection. My previous blogs covered some of the following topics: 1. Basics of dynamic power management 2. Very brief introduction to RNM...
    Posted to Low Power (Weblog) by Neyaz on Tue, Sep 21 2010
  • A Call For Power-Aware IP Models

    Power intent formats exist to express the design's low power techniques separately from the design's functional description. This promotes portability of the design across different power schemes. So why are most commercial IP providers forced to bury this critical information deep in gate-level...
    Posted to Low Power (Weblog) by Pete Hardee on Tue, Aug 3 2010
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