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Low Power,PSO

  • Dynamic Power Management – Closed Loop Voltage Scaling

    This posting is part of a series of blogs on dynamic power management in digital-centric mixed-signal verification environments. In this post, I'll discuss open-loop and closed-loop voltage scaling. In previous blogs, I covered some of the following topics: Basics of dynamic power management Very...
    Posted to Low Power (Weblog) by Neyaz on Tue, Aug 24 2010
  • Power Analysis: When Accurate Isn’t Accurate At All

    The notion that your ability to analyze power dissipation more accurately as your design proceeds down the levels of abstraction from system-level, to RTL, and to gate-level and transistor-level netlist has existed unchallenged for too long. Well, would I be tilting at windmills to challenge it? I could...
    Posted to Low Power (Weblog) by Pete Hardee on Fri, Aug 20 2010
  • A Call For Power-Aware IP Models

    Power intent formats exist to express the design's low power techniques separately from the design's functional description. This promotes portability of the design across different power schemes. So why are most commercial IP providers forced to bury this critical information deep in gate-level...
    Posted to Low Power (Weblog) by Pete Hardee on Tue, Aug 3 2010
  • Coarse PSO and the new Apple MacBook

    After a long day, I like to browse around the web, looking for interesting stories. Ok, yes, I’m a geek (as my daughter continues to remind me, accompanied by a roll of her eyes). But I found this story about the new MacBook too interesting to pass up. I agree with Seth that the most interesting...
    Posted to Logic Design (Weblog) by Rich Owen on Thu, Oct 16 2008
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