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Logic Design,chip planning

  • Ah, Power! Now Can I Drive?

    Last week a large number of customers and potential customers attended the “System-level Design & Chip Architecture for Low-Power ICs Techtorial and Workshop” sessions in Irvine, San Diego, and San Jose. They must have been monitoring sub-space communication channels or read this blog...
    Posted to Logic Design (Weblog) by Mike Carrell on Fri, Apr 24 2009
  • Friday Fun: Even a Marketing Guy Can Use InCyte!

    In this week's episode, Gronk, the unfrozen caveman marketing guy, discovers how easy it is to explore a new power architecture and get both technical and economic estimates using the InCyte software. Meanwhile, the design team realizes that what they need is an Extreme Makeover, Methodology Edition...
    Posted to Logic Design (Weblog) by Jack Erickson on Fri, Apr 24 2009
  • Friday Fun: Caveman Finds Cadence

    For those of you new to this series that want to come up to speed quickly, the best bet is to check out the "Notes" for each episode over on the "The Next Generation" Facebook page . Become a fan! After last week's desparation move by Charlene, the team realizes they need to do...
    Posted to Logic Design (Weblog) by Jack Erickson on Fri, Apr 10 2009
  • Can’t Wait To Try Power Management in the New InCyte Release?

    Coming up next week are several techtorial events, called " System-level Design & Chip Architecture for Low-Power ICs Techtorial and Workshop ". Yes, that's a keyboard-full of words. But the concept is simple. The main focus is on Power – from system-level to chip architecture...
    Posted to Logic Design (Weblog) by Mike Carrell on Fri, Apr 3 2009
  • New InCyte v3.5 Let’s You Manage Power, Without Being the “Power Expert”

    Quantify the trade-offs of Power Management techniques in Early Chip Planning with the new v3.5 release of Chip Planning Solutions . The Chip Planning Solutions team, who comes to Cadence via acquisition of ChipEstimate.com about one year ago, has just released a new version of InCyte . You may be familiar...
    Posted to Logic Design (Weblog) by Mike Carrell on Fri, Apr 3 2009
  • Chip Planning at Blazing Speeds with Incyte!

    I'm sooo pumped up about this new chip planning tool we acquired 6 months ago. Out of all the Cadence tools, this is definitely one of the hottest stuff according to customer feedback - it has the potential to change the way ASIC engineers and managers work because of the X factor in productivity...
    Posted to Logic Design (Weblog) by Kenneth Chang on Thu, Oct 9 2008
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