Cadence.com will be under maintenance from Friday, Oct. 3rd at 6pm (PST) thru Sunday, Oct 5th at 11pm (PST).
Cadence.com login, registration, community posting and commenting functionalities will be disabled.
Home > Community > Tags > Logic Design
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

Logic Design

  • How-to Plans for ECOs - Advice From Experts

    By Bassilios Petrakis I often wonder whether designers plan out well in advance their ECO methodology and strategy for a project. For instance, how do they determine how many spare gates to add, what type, where to place them, how to connect them. Or, what is the impact of RTL coding style, aggressive...
    Posted to Logic Design (Weblog) by Team FED on Thu, Oct 15 2009
  • Running Low on Power or Receiving Mixed Signals? Talk to the Expert Users

    Everytime my wife and I are looking to buy a big item, we do our research by reading blogs, articles, and customer reviews. I have to tell you, the single best source for information is through customer reviews and testimonials by actual users. Testimonials not only included the good stuff, but they...
    Posted to Digital Implementation (Weblog) by soheilm1 on Tue, Oct 6 2009
  • Branching Out - My Twitter Experiment

    I enjoy writing on this blog, but I don't get to post nearly as much as I would like. So I am going to try posting more often over on Twitter. It should be less-formal and more conversational, which are both more up my alley. I will of course continue to post here, too. If you are interested, you...
    Posted to Logic Design (Weblog) by Jack Erickson on Mon, Oct 5 2009
  • CDN Live! Silicon Valley -- A Video Invitation From Cadence CMO John Bruggeman

    CDNLive! Silicon Valley , the largest of the CDNLive! Cadence user conferences, will be open for worldwide participation in 2009. This year’s conference is a webinar-based event that allows on-line participation as well as on-site attendance at Cadence’s San Jose, California headquarters...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Sep 23 2009
  • The Current State of the Art for Physical Synthesis - A Response

    I am posting this detailed blog in response to an article posted on John's Semi-Blog regarding the current state of physical synthesis tools. I too have been involved in this domain all the way back to the Links to Layout methodology of the mid to late 90’s and there is no question that there...
    Posted to Logic Design (Weblog) by jflieder on Mon, Sep 14 2009
  • Friday Fun: Tapeout!

    Well, this is the finale of this season of The Next Generation. In it, the Dante Semi team celebrates their on-time tapeout, thanks to adopting modern design methodologies. It also has a bit of intrigue at the end. Hopefully this series has been entertaining and educational. We figured we would try something...
    Posted to Logic Design (Weblog) by Jack Erickson on Fri, Sep 11 2009
  • RTL Power Estimation

    RTL power estimation is a concept that has existed for a long time. The earlier that you can understand where power is consumed by your chip, the easier it is to make a positive impact. The challenge of course is obtaining accurate estimates. It is easy if you are estimating at the chip-level and most...
    Posted to Logic Design (Weblog) by Jack Erickson on Tue, Sep 8 2009
  • Friday Fun: A Last-minute ECO

    In this week's episode, the Dante Semi team is about to tape out when they get a last minute spec adjustment from their primary customer. Does this sound familiar? How will they make the change and verify it quickly enough to be able to tape out on time? (Hint: Conformal ECO ). Enjoy! If video fails...
    Posted to Logic Design (Weblog) by Jack Erickson on Fri, Sep 4 2009
  • Friday Fun: Cutting Ties to the Past

    In last week's installment , we left the Dante Semiconductor team when they were nearing tapeout, but their old vendor was asserting its own interests over that of the project. In this week's episode, the team comes together to break the final link so that they can move forward with taping out...
    Posted to Logic Design (Weblog) by Jack Erickson on Fri, Aug 28 2009
  • Friday Fun: Modern Methodology Has Benefits

    In this week's episode of "The Next Generation", the Dante Semi team reviews the project status after adopting many new techniques, such as power shutoff, assertion-based verification, physical synthesis, and multi-supply multi-voltage optimization. It looks like things are going well!...
    Posted to Logic Design (Weblog) by Jack Erickson on Fri, Aug 14 2009
Page 5 of 14 (138 items) « First ... < Previous 3 4 5 6 7 Next > ... Last »