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Logic Design

  • Logic Handoff Models at 45nm and Beyond

    CDNLive! Silicon Valley has been a good conference so far, lots of good papers and conversations. One thing I wanted to share was a panel discussion yesterday entitled "Logic Handoff Models at 45nm and Beyond." It was a great discussion, moderated by Ron Wilson of EDN, and on the panel were...
    Posted to Logic Design (Weblog) by Jack Erickson on Wed, Sep 10 2008
  • Feeling Restless ... CDNLive San Jose Conference Update!

    Ah yes ... my first blog here! I can't believe the freedom we're getting at Cadence, unfiltered blogging. :) I co-authored and helped deliver two presentations/papers yesterday with a couple of down-to-earth engineers. Thanks to everyone who was able to attend these sessions, it was fun meeting...
    Posted to Logic Design (Weblog) by Kenneth Chang on Wed, Sep 10 2008
  • Effectively communicating Low-Power and Power-Efficient Design knowledge

    For those of you interested in the Power space I recently had an article published on the Power Management DesignLine Europe website that talks about the challenges of capturing and communicating expertise and best practices throughout an organization (both large and small). The article talks about the...
    Posted to Digital Implementation (Weblog) by Neil Hand on Wed, Sep 3 2008
  • Logic Design at CDNLive! Silicon Valley -- see you Sept. 8!

    We've been working hard to put together another CDNLive! event, coming up September 8-11 in San Jose. There is a whole track dedicated to Logic Design. Some of the events I'll be working at are: Sept 8. at 8am: Techtorial " Achieve Project Success Through Early Low-Power Planning and Validation"...
    Posted to Logic Design (Weblog) by Jack Erickson on Wed, Aug 27 2008
  • Some tips for predicting power consumption

    In my previous post , entitled “How do you predict power?”, I was actually looking for reader input via the comments. I should have been more clear on that….perhaps I am too accustomed to my 6-year-old son, who will supply a barrage of responses to even a rhetorical question. Anyway...
    Posted to Logic Design (Weblog) by Jack Erickson on Mon, Aug 11 2008
  • How do you predict power?

    You read stories about it – the device or chip that comes out and consumes more power than expected. Maybe the battery life isn’t what it was supposed to be (my current smartphone is a great example!). Or even worse, maybe there are failures because the excessive power density generates too...
    Posted to Logic Design (Weblog) by Jack Erickson on Mon, Jul 28 2008
  • Customer Experiences With Low-Power Design

    Hello and welcome to the new Cadence community site, and my first blog post. You will see me here from time to time posting on topics and trends in the Power Efficient Design and Low Power Design area -- and most importantly, how we as a community can play a bigger part in ensuring your success. If you...
    Posted to Digital Implementation (Weblog) by Neil Hand on Sun, Jul 13 2008
  • High on Low Power

    Low power design has been a ubiquitous topic in the electronics industry the past couple years. The term "holistic" is often used (or over-used) to describe how you should approach low power design. I think the best illustration of how to approach low power design the right way to meet a customer's...
    Posted to Logic Design (Weblog) by Jack Erickson on Sat, Jul 12 2008
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