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Industry Insights,wide i/o
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TSMC 2013 Symposium: Progress in 20nm, 16nm FinFET, and 3D-IC Technologies
The TSMC 2013 Technology Symposium , held April 9 in San Jose, California, brought good news for anyone interested in advanced node or 3D-IC technologies. Keynote speakers noted excellent yields and significant progress in 20nm planar, 16nm FinFET, and Chip-on-Wafer-on-Substrate (CoWoS) technologies...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Apr 14 2013
Cadence, Imec Develop Test Methodology for 3D-IC Memory on Logic
3D-ICs that combine memory and logic promise tremendous benefits for low-power mobile applications, but design for test (DFT) remains a major concern. This week (Jan. 22, 2013) Cadence and the Belgian research institute imec are reporting progress with an automated DFT solution for memory-on-logic 3D...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Jan 22 2013
TSMC Forum: An Update on 20nm, 3D-IC, and 16nm FinFETs
TSMC, the world's largest semiconductor foundry, is thinking big when it comes to next-generation process technology. At the TSMC Open Innovation Platform (OIP) Ecosystem Forum Oct. 16, TSMC described reference flows for 20nm and for multi-die integration, and revealed that ARM and TSMC are working...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Oct 17 2012
A New Information Resource for 3D-IC TSV Design
A new solutions page on Cadence.com provides a great deal of information about 3D-ICs with through-silicon vias (TSVs). In addition to a description of the Cadence 3D-IC design, test, and semiconductor IP solutions, it includes press releases, blog posts, whitepapers, articles, and an archived webinar...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Oct 16 2012
Video: Enabling Next-Generation DRAM with DDR4, LPDDR3, and Wide I/O
If you want low-power, high-bandwidth access to off-chip DRAM, you're going to have to do some creative design work. A recent video presentation provides a good overview of some of the challenges, and shows how more intelligent memory controller and PHY IP is needed to support next-generation standards...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Aug 1 2012
TSMC-Cadence Collaboration Helps Clarify 3D-IC Ecosystem
Perhaps the most challenging question about 3D-IC design is what gets done when, by which kind of provider. With its recently introduced chip-on-wafer-on-substrate ( CoWoS ) process, TSMC has taken a step towards clarifying what the 3D-IC ecosystem might look like. And Cadence helped refine the methodology...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Jun 4 2012
Q&A: GSA Working Group Tackles Barriers to 3D-IC Adoption
The Global Semiconductor Alliance ( GSA ) 3D IC Working Group is helping pave the way to mainstream adoption of 3D-ICs. With around 275 members, this group provides a neutral forum in which representatives of EDA vendors, design services houses, foundries, outsourced assembly and test (OSAT) providers...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, May 21 2012
EDA Symposium: Users Cite 3D-IC Design Tool Needs
What's needed to bring 3D-ICs with through-silicon vias (TSVs) - or 2.5D ICs with silicon interposers - into the IC design mainstream and volume production? That question resonated through a day-long session on 3D-ICs at the Electronic Design Processes Symposium ( EDPS ) April 6, 2012 in Monterey...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Apr 9 2012
Join EDA “Movers and Shakers” at IEEE EDP Symposium – Cloud, 3D-ICs, Power and More
If you want a deeper understanding of the challenges, trends, and potential new solutions for IC and systems design, there's no better place to find out than the IEEE-sponsored Electronic Design Processes Symposium (EDP) April 5-6, 2012, in Monterey, California. Now in its 19 th year, this interactive...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Mar 8 2012
Top Ten Cadence Community Blog Posts of 2011
Over 430 Cadence Community blog posts appeared in 2011, in categories including Industry Insights, Functional Verification, PCB Design, System Design & Verification, Custom IC, Digital Implementation, RF, Mixed Signal, and Low Power. By looking at the most widely-read posts, we can get a picture...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Sun, Jan 1 2012
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