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Incyte
Adam Traidman
AE
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Q&A: Adam Traidman Updates Silicon IP Trends and ChipEstimate.com
As president and CEO of Chip Estimate before its 2008 acquisition by Cadence, Adam Traidman has been a front-row observer of the silicon IP business for many years. His company developed the InCyte chip planning tool, which includes an IP database to help designers predict area and performance. Today...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Feb 23 2012
Friday Fun: InCyte Chip Estimator infomercial
This is our second (and last, for now) foray into the genre of cheesy American commercial advertisement. Here was our first attempt . I've been fascinated with the infomercial approach ever since I received "The ShamWow" for Father's Day from my proud son, who then asked for some red...
Posted to
Logic Design
(Weblog)
by
Jack Erickson
on Fri, May 14 2010
The new ChipEstimate.com: The place to be for IP
If you are not yet familiar with the ChipEstimate.com site.....first, why not? It is the leading portal for design IP with over 200 IP suppliers and over 8,000 components available. The team behind the site has been hard at work making it an even more compelling destination for all things IP. For instance...
Posted to
Logic Design
(Weblog)
by
Jack Erickson
on Wed, Apr 21 2010
ISQED Keynote: Putting Some Numbers To Cost-Aware Design
We've all heard about the escalating costs of system-on-chip (SoC) development. But what are the costs, and what are the potential savings? Steve Glaser, corporate vice president of strategic development at Cadence, filled in some of those numbers at a keynote speech March 24 at the International...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Mar 29 2010
A Critical Step In The IC Design Flow
Every IC design team does it. Most don’t have a name for it and most don’t use automated tools. It may not show up on flowcharts depicting the IC design flow, and most EDA vendors pay little attention to it. But it’s an absolutely critical part of the IC design flow that can make the...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Jan 14 2010
User Interview: How To Estimate Power Early
Early power estimation makes it much easier to manage IC power, according to Camille Kokozaki, director of design automation services at Integrated Device Technology ( IDT ). At the recent CDNLive! Silicon Valley , he presented a case study of architectural power estimation with a 65nm system-on-chip...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Oct 29 2009
Ah, Power! Now Can I Drive?
Last week a large number of customers and potential customers attended the “System-level Design & Chip Architecture for Low-Power ICs Techtorial and Workshop” sessions in Irvine, San Diego, and San Jose. They must have been monitoring sub-space communication channels or read this blog...
Posted to
Logic Design
(Weblog)
by
Mike Carrell
on Fri, Apr 24 2009
Friday Fun: Even a Marketing Guy Can Use InCyte!
In this week's episode, Gronk, the unfrozen caveman marketing guy, discovers how easy it is to explore a new power architecture and get both technical and economic estimates using the InCyte software. Meanwhile, the design team realizes that what they need is an Extreme Makeover, Methodology Edition...
Posted to
Logic Design
(Weblog)
by
Jack Erickson
on Fri, Apr 24 2009
System-level Low Power Techtorials/Workshops Off To A Great Start!
Back in my 24 March blog I mentioned how Cadence was kicking off a major techtorial/workshop series across North America on low power chip design, using the newest Cadence tools at the ESL/System/Chip Architecture level. Last week we concluded the first three events, all in California: Irvine, San Diego...
Posted to
System Design and Verification
(Weblog)
by
SteveSvoboda
on Mon, Apr 20 2009
Friday Fun: Caveman Finds Cadence
For those of you new to this series that want to come up to speed quickly, the best bet is to check out the "Notes" for each episode over on the "The Next Generation" Facebook page . Become a fan! After last week's desparation move by Charlene, the team realizes they need to do...
Posted to
Logic Design
(Weblog)
by
Jack Erickson
on Fri, Apr 10 2009
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