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Incyte,chip estimate

  • Q&A: Adam Traidman Updates Silicon IP Trends and ChipEstimate.com

    As president and CEO of Chip Estimate before its 2008 acquisition by Cadence, Adam Traidman has been a front-row observer of the silicon IP business for many years. His company developed the InCyte chip planning tool, which includes an IP database to help designers predict area and performance. Today...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Feb 23 2012
  • Friday Fun: InCyte Chip Estimator infomercial

    This is our second (and last, for now) foray into the genre of cheesy American commercial advertisement. Here was our first attempt . I've been fascinated with the infomercial approach ever since I received "The ShamWow" for Father's Day from my proud son, who then asked for some red...
    Posted to Logic Design (Weblog) by Jack Erickson on Fri, May 14 2010
  • ISQED Keynote: Putting Some Numbers To Cost-Aware Design

    We've all heard about the escalating costs of system-on-chip (SoC) development. But what are the costs, and what are the potential savings? Steve Glaser, corporate vice president of strategic development at Cadence, filled in some of those numbers at a keynote speech March 24 at the International...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Mar 29 2010
  • A Critical Step In The IC Design Flow

    Every IC design team does it. Most don’t have a name for it and most don’t use automated tools. It may not show up on flowcharts depicting the IC design flow, and most EDA vendors pay little attention to it. But it’s an absolutely critical part of the IC design flow that can make the...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jan 14 2010
  • Ah, Power! Now Can I Drive?

    Last week a large number of customers and potential customers attended the “System-level Design & Chip Architecture for Low-Power ICs Techtorial and Workshop” sessions in Irvine, San Diego, and San Jose. They must have been monitoring sub-space communication channels or read this blog...
    Posted to Logic Design (Weblog) by Mike Carrell on Fri, Apr 24 2009
  • There's Still Life at 130 nm and Above

    Previously unpublished data from ChipEstimate.com suggests that design activity at the 130 nm and 180 nm process nodes remains very strong, despite a recent upsurge in interest in 65 nm. This data has some interesting implications for EDA, silicon IP, and foundry providers, as well as IC design teams...
    Posted to Industry Insights (Weblog) by rgoering on Tue, Apr 7 2009
  • When Green Chips Turn Brown

    I went to New York City last weekend and went to see a Broadway show called Avenue Q. It's a very adult adaption of Sesame Street (sort of). Before you grab a bus, plane, or train to NYC to see this show with your kids, be forewarned. Puppets aside, this is NOT a show for children. And while that...
    Posted to Logic Design (Weblog) by jflieder on Thu, Nov 20 2008
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