Cadence.com will be under maintenance from Friday, Oct. 3rd at 6pm (PST) thru Sunday, Oct 5th at 11pm (PST).
Cadence.com login, registration, community posting and commenting functionalities will be disabled.
Home > Community > Tags > IR drop issue
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

IR drop issue

Sorry, but there are no more tags available to filter with.
  • IR drop issue

    Hi , We have silicon/design that is strugling to recover from IR drop issue. To reduce the IR drop problem, decap cells are placed in design. My assumption is that decap cells reduce the impact of IR drop by supplying the dynamic current when there is a drop in voltage. Our designs / patterns have IR...
    Posted to Digital Implementation (Forum) by Rajan Aggarwal on Tue, Jul 8 2014
Page 1 of 1 (1 items)