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IES-XL,OVM e,VIP,OVM SV

  • "We Want UVM 1.0! When Do We Want it? Now!"

    Short of holding signs and yelling slogans, the 12 customers I visited in the past week all declared this mantra. All are planning to move to UVM 1.0 with all of them requiring the phasing and register package capabilities, but only one also requiring TLM2 support, primarily for accessing SystemC models...
    Posted to Functional Verification (Weblog) by Adam Sherilog on Thu, Oct 7 2010
  • Inside Cadence: Training for EDA360

    Over the past few weeks all of Cadence's Verification and Systems Solutions Applications Engineers (AEs), Services Engineers, and many Customer Support staff, have been brought together for detailed methodology and product training. The objectives of this ambitious undertaking are to bring their...
    Posted to Functional Verification (Weblog) by jvh3 on Thu, May 6 2010
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