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IC610,MMSIM70

  • VerilogA Problem in MMSIM-7.1

    Hi, I am having a problem to simulate my verilogA files under MMSIM 7.1. They work fine under MMSIM-6.0. In spectreout, I get: ERROR (VACOMP-1008): Cannot compile ahdlcmi module library. Check the log file input.ahdlSimDB/3821_soi12so_Test_Tapeout_Sept09_BinarySearch_veriloga_veriloga.va.BinSearch.ahdlcmi...
    Posted to Custom IC Design (Forum) by gokce on Wed, Jun 3 2009
  • how to create link between new MMSIM and ADEGXL in IC610

    hi I am having trouble in linking MMSIM and ADEGXL. When I try to run simulation in ADEGXL then it shows me the error “ ADEXL-1613: Following tests use older version of Spectre: sensor: inverter_new:1. Make sure to use MMSIM60 or above for these tests”. So I installed newer version of MMSIM...
    Posted to Custom IC Design (Forum) by ashraf on Tue, Jul 29 2008
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