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IC6

  • DIVA LVS Error

    Forum users, I've created a schematic and layout of a simple cell using IC6.1.0 and trying to perform DIVA LVS by invoking it from the Virtuoso Layout L window by selecting Verify->LVS... I am getting an error that I think signifies that the layout is failing to netlist. Please see attached figure...
    Posted to Custom IC Design (Forum) by saullacour on Mon, Apr 23 2012
  • Running Cadence IC on VMware?

    My IT department is very enthusastic about putting everything on VMware. They say that this will make their job much easier. I would like to know if you, anyone, or your company has tried running Cadence IC, ADE, or Virtuososo (any version) on VMware and how it worked out for you.
    Posted to Custom IC Design (Forum) by John Reeder on Fri, Apr 6 2012
  • IC6 design tool.

    I'm looking for experienced IC6 users that are willing to answer questions, most are simple.
    Posted to Custom IC Design (Forum) by ICredneck on Thu, Feb 9 2012
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