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Global Foundries,lithography

  • Common Platform Forum Keynotes: 14nm FinFETs and Beyond

    How far can we continue to scale semiconductors? 14nm FinFET technology is the next major move, but that's far from the end of the story, according to keynote speakers at the Common Platform Technology Forum in Santa Clara, California Feb. 5, 2013. The keynotes, still available for on-line viewing...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Feb 6 2013
  • GLOBALFOUNDRIES DRC+ Donation: New Era for DFM Standards?

    DRC+, a pattern-matching design for manufacturability (DFM) technique developed by GLOBALFOUNDRIES in collaboration with Cadence, is heading for standardization through the Silicon Integration Initiative (Si2). As announced Oct. 20 at the Si2 Conference , GLOBALFOUNDRIES has donated DRC+ data structures...
    Posted to Industry Insights (Weblog) by rgoering on Sun, Oct 23 2011
  • GTC Presentation: Cadence Outlines Comprehensive 20nm Design Flow

    The design and manufacturing challenges of 20nm ICs are formidable, and will not be solved by loose collections of point tools. At the recent Global Technology Conference ( GTC ), Cadence presented its view of 20nm challenges and previewed a comprehensive 20nm design methodology that encompasses custom...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Sep 7 2011
  • How DRC Plus Makes DFM Easy at 28nm

    Design for manufacturability (DFM) requirements have been a barrier for many design teams who are thinking about moving to lower process nodes. But can DFM actually get easier as process nodes shrink? That possibility is offered by DRC Plus (DRC+), a new technology developed by GLOBALFOUNDRIES in collaboration...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Oct 25 2010
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