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Gary Smith

System-Level Low Power Design – What Will it Take to Move There?

While many low-power design techniques are available to IC designers, the greatest potential for power savings is at the system level, where both software and hardware can be considered. So what's standing in the way of system-level low power design, and what needs to happen to make it practical...

Posted to Industry Insights (Weblog) by rgoering on Wed, Apr 18 2012
Is System Modeling the Next EDA Abstraction Level?

According to a recent talk by Frank Schirrmeister, group director of product marketing for the Cadence System and Software Realization Group, the answer is "yes." System modeling is a level of abstraction that's independent from hardware and software implementation. But there are some interesting...

Posted to Industry Insights (Weblog) by rgoering on Sun, Apr 15 2012
ARM TechCon Highlights Roundup – Blogs, Videos, and More

The recent ARM TechCon conference was a great success, and so much happened in 3 days there that it's very difficult to keep track of it all. Here's a "coverage roundup" that includes some pointers to blogs, articles, and videos that might help fill in anything you missed - or shed...

Posted to Industry Insights (Weblog) by rgoering on Thu, Nov 3 2011
Hot Topic Revisited: System-Level Design and a “New Class” of Engineer

Six months ago I wrote a blog post that considered the question, Is System-Level Design Creating a New Class of Engineer? Since then an ongoing discussion in the LinkedIn electronic system level (ESL) design group has added some new perspectives not considered in my original blog post. To quickly recap...

Posted to Industry Insights (Weblog) by rgoering on Thu, Oct 6 2011
Why Cadence Bought Azuro – A Closer Look

Cadence announced July 12 its acquisition of Azuro , a provider of "clock concurrent optimization technology" (ccopt). But why, given that Cadence already has clock tree synthesis inside the Encounter Digital Implementation Platform? The answer is that Azuro technology goes far beyond clock...

Posted to Industry Insights (Weblog) by rgoering on Sun, Jul 24 2011
Gary Smith at DAC: EDA Must Meet Its “Responsibilities”

Is the EDA industry "responsible?" Not unless EDA tools provide enough automation to keep design costs low, according to Gary Smith, chief analyst at Gary Smith EDA . Speaking at his annual industry forecast talk June 5, on the eve of the Design Automation Conference (DAC), Smith said that...

Posted to Industry Insights (Weblog) by rgoering on Sun, Jun 5 2011
Combating System-Level Design Confusion

I would like to add my thanks to Gary Smith for his short "Industry Note" titled " ESL Behavioral Design " that I first saw in a post by Steve Leibson . Yes, the note is pretty short and topic is pretty broad, but the diagram and definitions of Silicon Virtual Prototype (SVP) and...

Posted to System Design and Verification (Weblog) by jasona on Mon, Apr 11 2011
Is System-Level Design Creating a New Class of Engineer?

The move to electronic system level (ESL) technologies such as virtual prototyping is well underway - but what's the impact on the engineering organization? A recent panel discussion and an industry note published by analyst Gary Smith both suggested that new engineering roles are evolving, and several...

Posted to Industry Insights (Weblog) by rgoering on Thu, Apr 7 2011
Panelists: “Designer of Future” Needs New Hardware, Software Skills

There's been much talk about the tools and methodologies needed for next-generation electronic systems design, but not so much about the people behind them. The people side of system-level design became clearer at a DesignCon panel titled "Who is the Designer of the Future?" One conclusion...

Posted to Industry Insights (Weblog) by rgoering on Sun, Feb 6 2011
Gary Smith at DAC: SoC Design Costs Will Come Down

System on chip (SoC) design costs are out of control and headed towards $100 million, but there's relief in sight, according to analyst Gary Smith at a Sunday presentation before the Design Automation Conference (June 14-18). In most respects Gary's speech, titled "Don't Panic! SoC Costs...

Posted to Industry Insights (Weblog) by rgoering on Sun, Jun 13 2010

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Gary Smith

System-Level Low Power Design – What Will it Take to Move There?

Is System Modeling the Next EDA Abstraction Level?

ARM TechCon Highlights Roundup – Blogs, Videos, and More

Hot Topic Revisited: System-Level Design and a “New Class” of Engineer

Why Cadence Bought Azuro – A Closer Look

Gary Smith at DAC: EDA Must Meet Its “Responsibilities”

Combating System-Level Design Confusion

Is System-Level Design Creating a New Class of Engineer?

Panelists: “Designer of Future” Needs New Hardware, Software Skills

Gary Smith at DAC: SoC Design Costs Will Come Down