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Functional Verification,Palladium XP
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Securing Invisible Things … or “Why Denial Works!”
The opening keynote of the Embedded World conference in Germany left me with chills. No, it was not a grand theatrical performance letting me crave for more. It simply scared the bejevies out of me with respect to the safety and security of embedded devices, some of which I use each day. Luckily -- as...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Wed, Feb 27 2013
System Design 2012 – Real Users Achieving Real Results!
This morning the final success story my team has been working on for this year went live. Texas Instruments reports on how they achieved greater than 90% accurate correlation between an architectural power estimation and actual silicon! This deserves its own blog early next year, but meanwhile, it has...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Fri, Dec 21 2012
Optimizing ARM Based Designs for Low Power using Emulation
The month November goes to the Brits, no question. Not only did the James Bond movie Skyfall open, but Santa Clara also experienced somewhat of a "British Invasion" for ARM TechCon in the Santa Clara convention center. To be there properly I even brought out my favorite new pin striped suit...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Mon, Nov 19 2012
How Many Cycles are Needed to Verify ARM’s big.LITTLE on Palladium XP?
At the recent CDNLive! India user conference, Deepak Venkatesan and Murtaza Johar representing ARM India gave a fascinating presentation called "Verifying big.LITTLE using the Palladium XP". Registered Cadence.com users can get the presentation here once the proceedings are published. ARM's...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Tue, Oct 30 2012
Being The Energizer Bunny at DAC … Championing System-Level Design and Verification ;)
As the EDA industry and its customers are preparing for the yearly show down at the Design Automation Conference (DAC), it is good to review what I said in the past. Well, two years ago I wrote a blog called "Maybe This Time" ( inspired by the Sally Bowles song in Cabaret , I am a Musical Geek...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Fri, Jun 1 2012
How Debug Breakthroughs are Enabled by In-Circuit Acceleration
We in product management are often accused of jumping the gun and announcing products too fast. Users are looking at press releases and are wondering "sounds great, but does it really work?" Cadence announced earlier this week new in-circuit acceleration capabilities to our System Development...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Wed, May 16 2012
The Facts: Why Accelerated VIP Is Needed for SoC Verification
On Tuesday May 15 th Cadence announced the expansion of our VIP Catalog to include accelerated VIP (AVIP). You may be wondering why Cadence is investing in accelerated VIP (which runs on an accelerated platform such as the Palladium XP) when we already have the market leading simulation VIP. Good question...
Posted to
Functional Verification
(Weblog)
by
PeteHeller
on Tue, May 15 2012
2011 CDNLive EMEA Highlights and Image Gallery: An EDA360 Spring Festival of Deliverables
Last week teammate Adam Sherer and I had the honor of representing the Incisive functional verification platform at the annual CDNLive for Europe, the Middle East and Africa (EMEA) in Munich, Germany. Among our tasks was to deliver the annual verification roadmap update; support numerous techtorials...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Tue, May 10 2011
Video: DVCon 2011 Update From NextOp CEO Yunshan Zhu
At DVCon 2011 I had the opportunity to catch-up with NextOp's CEO Yunshan Zhu, where in this video he shares some anecdotes about the BugScope's performance in real world customer environments (including accelerating assertions in Palladium with -0- (zero, zip, zilch, nada) hardware overhead...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Mon, Mar 21 2011
DAC360: Photo blog of DAC 2010 in Anaheim, CA
Click here or on the image below to go to the annotated photo blog of DAC 2010. Images and notes include highlights from: * The Cadence and OVM/UVM booths * Sites around the show floor * Things outside of the expo, including panels, papers, and presentations (Yes, there is more to DAC than booths!) Enjoy...
Posted to
Functional Verification
(Weblog)
by
jvh3
on Tue, Jun 22 2010
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