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Gentlemen, Start Your Simulation Engines
As we outlined in our recent performance white paper , every verification team has the need for higher performance simulation. Of course, you can expect on-going innovation from Cadence R&D, but there are some things you can do to get more from your engine at any time. The February 23, 2012 webinar...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Wed, Feb 22 2012
OVM 2.1.2 -- Getting You Ready for UVM
Talk about stability -- OVM 2.1.1 has had 18 months as the core of Accellera's UVM and accumulated only 13 bugs. Not too shabby! With the OVM community preparing to migrate, Cadence and Mentor have posted a bug-fix update -- OVM 2.1.2 -- to OVMWorld to help you get ready to move to the UVM. As you...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Tue, May 31 2011
Users Employ Specman Constrained-Random Verification for Complex IP
Two recent customer examples have shown the effectiveness of Specman constrained-random verification for complex SoCs. Raimund Soenning, manager of hardware development for the Graphics Competence Center at Fujitsu Semiconductor Europe (Germany), and Sarmad Dahir, ASIC designer at Ericsson (Sweden),...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Fri, Sep 3 2010
Performance Tips and Tricks: Coding e Ports for Enhanced Performance
This blog entry builds on last week's Tips and Tricks posting in which we discussed the usage of list.delete(0) in Tip 1. This week, we discuss a topic that is close to many users. Ports are used widely throughout the verification environment as one of the main mechanisms for interacting with HDL...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Fri, Sep 3 2010
IntelliGen Moving Into The Spotlight With Pgen Deprecation
Specman's new Aspect Oriented Generation Engine, IntelliGen, has now been in service for several years and we have received much positive feedback from customers in terms of ease of use, solvability, coverage and performance. For more information on IntelliGen, check out the following links, as well...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Fri, Jun 25 2010
DAC Cabbie Taught Me All I Need to Know About Verification
Confidence from competence. Measurement through metrics. Sell without selling. These are the pearls I learned from my cab driver on the way home from DAC. Aside from the core truths they convey, they clearly define the top three verification items I saw at 47th DAC in Anaheim this year. Topping my list...
Posted to
Functional Verification
(Weblog)
by
Adam Sherilog
on Mon, Jun 21 2010
Built-in Message Logging – Part 2 of 2
[Team Specman welcomes back guest blogger, Michael Avery from our Services Group in the UK] Building on the Part 1 introduction to Specman’s messaging built-in infrastructure , allow me to share some tips on how to programmatically control and scale message display to help shorten your debug time...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Wed, Mar 17 2010
Tech Tip: Easy Way To Re-Run Using The Same Seed
[Team Specman welcomes back Application Engineer Hilmar Van Der Kooij as this week’s guest blogger] Often we want to re-run a simulation with the exact same random seed that was used in the previous one. Unfortunately far too many people (ok, maybe just me) have used little scraps of paper or sticky...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Fri, Feb 5 2010
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