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Encounter ECO

  • How to optimize level shifter and isolation instances marked dont touch in Encounter

    Hi All, I am implementing a Low-power design with Power switches and Isolation cells. I have a CPF file that I commit and I can see that isolation cells and level shifters are inserted into the design correctly as I intended. However, whenever I run optDesign, whether it be preCTS, postCTS or postRoute...
    Posted to Digital Implementation (Forum) by fieldy on Sun, Sep 22 2013
  • Re: Question about buffering of multi-driver nets

    ecoAddRepeater -cell cell_name -net net_name -relativeDistToSink value This command add the buffer based on the relativeDistToSink value. The value should between 0 to 0.9. A low value (0.1) places the buffer near the sink; a high value (0.9) places the buffer near the driver. For example, ecoAddRepeater...
    Posted to Digital Implementation (Forum) by selvam27 on Wed, Jun 27 2012
  • ENCOUNTER ECO - module

    Hi, we use encounter to implement most of our ECO's. However, we have an ECO which requires too many gates. We have heard that some people rip out a module, and have the tool replace the module with the new netlist. The question is what is the procedure to do that? It is easy enough to locate the...
    Posted to Digital Implementation (Forum) by checkerbum2 on Tue, Jun 26 2012
  • Slotting problems

    Hi, 1. I was interested in knowing how can we slot wide metal connects in our automated flow of encounter, I have found an option in place and route, its a guide file which is a text file but that is an option which is not viable. 2. How can I increase the width of the routing metals. Thanks in advance...
    Posted to Digital Implementation (Forum) by BraveHeart on Mon, Jun 4 2012
  • spare logic is not tied up/down properly after ECO route

    In my ECO step, a number of logic gates are freed up and become spare gates. They should be connected to VDD or GND selectively. What command should I use? The large majority are grounded, but a few are tied high. Note: I don't have tieHi or tieLo cells in my library; I want to hook up directly....
    Posted to Digital Implementation (Forum) by achilles on Fri, Jun 17 2011
  • RULE LEF_DEFAULT definition for Abstract Generator/Encounter/NanoRoute

    I am using Cadence Abstract Generator to create abstract cell views for a standard cell library. In the Verify Step, I keep getting the following error: Encounter: (NRDB-158) There is no default via from LAYER MET1 to LAYER MET2 in RULE LEF_DEFAULT. I do not know how or where to define this RULE LEF_DEFAULT...
    Posted to Custom IC Design (Forum) by eklikeroomys on Tue, Mar 15 2011
  • Power Net Extraction Problem in Abstract Generator

    Halo, I am creating abstract cell views for a digital standard cell library using Cadence Abstract Generator.I have the following problem: In the Extract Step, I set the tool up to extract signal and power nets and to create pins on metal 1 so that my abstract view will keep its connectivity. The extract...
    Posted to Custom IC Design (Forum) by eklikeroomys on Mon, Mar 14 2011
  • Thanks!

    Bob, Thanks for your advise. After tinkering around a bit, I was able to run ECO process. It was a tad tricky, since I was using an older verion of Encounter, which did not have "ecoDesign" Thanks again! Regards Sirrius
    Posted to Digital Implementation (Forum) by Sirrius on Mon, Nov 17 2008
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