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ESL,C-to-Silicon Compiler,HLS

What to See at the DATE Conference: High-Level Synthesis

The DATE (Design Automation and Test in Europe) Conference is next week (March 18-22, 2013) in Grenoble, France. If you are lucky enough to be in Grenoble at this time of year, it will be worth it to check out Session 11.2 "High-Level Synthesis and Coarse-Grained Reconfigurable Architectures."...

Posted to System Design and Verification (Weblog) by Jack Erickson on Thu, Mar 14 2013
C-to-Silicon Japan User Group and Ikegami Production Experience

We have been seeing some rapid growth in adoption of C-to-Silicon Compiler high-level synthesis. Given that it is a new way of doing design, we have been holding user local groups to get customers together with Cadence people to share experiences, information, and ideas so that we can all benefit. We...

Posted to System Design and Verification (Weblog) by Jack Erickson on Tue, Jul 3 2012
High-Level Design and Verification: How Can We Finally Move on From the Forrest Gump Era?

Richard Goering wrote an excellent summary of the DAC panel "High Level Synthesis Deployment: Are We Ready?," which can be found here . His conclusion is that we are getting close, and one of the biggest hurdles still to overcome is the skill set -- the combination of hardware design expertise...

Posted to System Design and Verification (Weblog) by Jack Erickson on Tue, Jun 26 2012
High-Level Synthesis Users: Productivity Gains Beckon, But Learning Curve Comes First

SystemC-based high-level synthesis (HLS) tools have greatly improved in recent years and are undergoing adoption by many large semiconductor companies. But to get high productivity out of HLS, current RTL designers will first face a learning curve, according to panelists at the recent Design Automation...

Posted to Industry Insights (Weblog) by rgoering on Mon, Jun 25 2012
Q&A: Linking Virtual Prototypes to High-Level Synthesis

Virtual prototypes for early software development and high-level synthesis tools for hardware implementation are two important new technologies that are raising the abstraction level in electronic systems design. But these tools are traditionally isolated from one another because they require different...

Posted to Industry Insights (Weblog) by rgoering on Wed, Jun 29 2011

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ESL,C-to-Silicon Compiler,HLS

What to See at the DATE Conference: High-Level Synthesis

C-to-Silicon Japan User Group and Ikegami Production Experience

High-Level Design and Verification: How Can We Finally Move on From the Forrest Gump Era?

High-Level Synthesis Users: Productivity Gains Beckon, But Learning Curve Comes First

Q&A: Linking Virtual Prototypes to High-Level Synthesis