Home > Community > Tags > EDA/chip design
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

EDA,chip design

  • NVidia’s Bill Dally: Chip Design Should Take Days, Not Months

    Bill Dally, chief scientist at NVidia, thinks that two engineers in a garage should be able to design a prototype system on chip (SoC) in a couple of weeks. At the recent Design Automation Conference ( DAC 2013 ), he presented a plan for making that possible—a modular chip design strategy that...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Jun 24 2013
  • DVCon Panel: Will Differentiation Through Software Kill Chip Design?

    Will systems-on-chip (SoCs) become so expensive to design that people are going to buy chips off the shelf, and differentiate products through software alone? That's one question that was put before a panel of EDA industry experts at the DVCon conference Feb. 29, 2012. Short answer -- no, but we...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Mar 1 2012
  • A blog for the adults

    Welcome to my blog – I hope you find it useful, or at least entertaining. My background is that I did chip design for 16 years before entering the EDA biz. I focused on front end design, doing RTL coding, testbench development, synthesis, and working with the place and route teams. As I moved along...
    Posted to Logic Design (Weblog) by Rich Owen on Fri, Sep 26 2008
Page 1 of 1 (3 items)