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EDA,Power

  • Panelists: Rethinking System-to-Silicon Verification from the Top Down

    Bring together three of the best known and most opinionated voices in EDA - along with a Cadence R&D executive - and what do you have? A spirited panel discussion on electronic system level (ESL) functional verification, along with a call for a "top down" verification approach guided by...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Sep 30 2013
  • ARM CTO at DAC 2012: The Truth About Semiconductor Scaling

    As process nodes shrink, semiconductor scaling more or less follows the predictions of Moore's Law - but there are some surprising twists and turns. In a keynote speech at the Design Automation Conference ( DAC 2012 ) June 5, Mike Muller, co-founder and CTO of ARM, compared the original ARM1 processor...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Jun 6 2012
  • A blog for the adults

    Welcome to my blog – I hope you find it useful, or at least entertaining. My background is that I did chip design for 16 years before entering the EDA biz. I focused on front end design, doing RTL coding, testbench development, synthesis, and working with the place and route teams. As I moved along...
    Posted to Logic Design (Weblog) by Rich Owen on Fri, Sep 26 2008
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