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DEHDL
"PCB design"
16.01
16.2
16.5
16.6
advanced package designer
ADW
ADW 16.3
Allegro
Allegro 16.3
Allegro 16.5
Allegro 16.6
Allegro Design Entry
Allegro Design Workbench
Allegro PCb
Allegro PCB Editor
Allegro PCB SI
Allegro System Architect (ASA)
Allegroro
AMS simulation
APD
application note
ASA
Cadence 16.5
Capture 16.5
Capture CIS
Capture-CIS
CDNLive
CDNLive!
Component Alignment
component browser
ConceptHDL
Constraint Manager
constraints manager
creation
DBeditor
DEHDL find
design
design data management
Design Entry
Design Entry CIS
Design Entry HDL
Design Rule Checker
diff pairs
Differential Pair Support
differential pairs
Digital SiP design
Directive Lockhing
edit symbol
electrical constraints
File Directives
Footprint
Footprint catalog PCB Editor
Front-end PCB design
Grzenia
HDI
HDL
hierarchical schematics
hierarchy
High Speed
High-Density Interconnect
layout
librarian
Librarians
Library
Library and design data management
Library flow
Library Revision Manager
LRM
mechanical parts
OrCAD Capture
OrCAD PCB Editor
package
part developer
PCB
PCB Capture
PCB design
PCB Editor
PCB Layout and routing
pcb librarian
PCB SI
PCB Signal and power integrity
PCB Signal integrity
Property
ptf
Schematic
schematics
SCM
SI
SI analysis and modeling
Signal Intregrity
SigXP UI
SPB
SPB 16.2
SPB 16.3
SPB16.01
SPB16.2
SPB16.3
SPB16.5
symbol
LIBRARY REVISION VISIBILITY
We currently distribute our global library over a network folder using hard coded Enviromental Veriables. The problem is that we have no way of knowing when the library was last updated. This can cause users to be un-aware of recent library updates or if they are using old revisions of the library (due...
Posted to
PCB Design
(Forum)
by
Jonah Stephenson
on Thu, Aug 19 2010
What's Good About Deleting Parts in ADW? You Can Easily Do This In ADW16.3!
Part, Schematic, Footprint and Models can all be deleted from the database now with the Allegro Design Workbench ADW16.3 release. Schematic and footprint models may only be deleted if they are not associated with a part. Once a Schematic or Footprint model is deleted from the database, the model is removed...
Posted to
PCB Design
(Weblog)
by
Jerry GenPart
on Wed, Aug 18 2010
What's Good About DEHDL Anchor Point Wire Stretch? It's In SPB16.3!
Just a very quick post this week on a simple, but elegant new SPB16.3 feature for the Allegro Design Entry HDL product. Prior to the SPB16.3 release, Design Entry HDL ( DEHDL ) did not have the capability of drawing a new wire from an anchor point of an existing wire. Introducing the anchor point wire...
Posted to
PCB Design
(Weblog)
by
Jerry GenPart
on Wed, Aug 11 2010
What's Good About SCM and Packageable Schematics? The Secret's in the SPB16.3 Release!
Many customers want to use System Connectivity Manager (SCM) known as Allegro System Architect (ASA) for quick prototyping and then start using the traditional schematic based PCB design flow. Now with the Export Schematic feature available in the SPB16.3 release, you can use System Connectivity Manager...
Posted to
PCB Design
(Weblog)
by
Jerry GenPart
on Wed, May 12 2010
What's Good About DEHDL Alignment? You’ve got it in the SPB16.3 Release!
Schematic construction requires a lot of effort in placing components, wires and text/notes in such a way that the end schematic looks neatly organized. Aligning and distributing objects on a schematic can be time-consuming if it has to be done manually. The Alignment and Distribution functionality provided...
Posted to
PCB Design
(Weblog)
by
Jerry GenPart
on Wed, May 5 2010
What's Good About DEHDL Font Support? The Secret's in The SPB16.3 Release!
Well - it's here! Native font support in Allegro Design Entry HDL (DEHDL)! This has been a often requested feature and is particularly important for our mil-aero customers. The DEHDL environment has conventionally provided support for vector fonts (6 flavors of basic fonts), where only a single font...
Posted to
PCB Design
(Weblog)
by
Jerry GenPart
on Thu, Feb 4 2010
What's Good About DEHDL Usability Improvements? The Secret's in the SPB16.2 Release!
The Design Entry HDL (DEHDL) usability improvements are many and significant in the SPB16.2 release! The DEHDL product moves even closer to other Windows based applications, such as Capture CIS, Adobe Reader and Microsoft Office applications, in terms of the general usability standards. These changes...
Posted to
PCB Design
(Weblog)
by
Jerry GenPart
on Wed, Aug 12 2009
How to check if all component pins are connected in ConceptHDL.
One important check step for schematic design is component pin connection check. It will check all component pins are connected other than pins that are placed with NOCHECK symbol, like ORCAD capture. But it seems ConceptHDL can not do such important check in CheckPlus. Also it seems there is no NOCHECK...
Posted to
PCB Design
(Forum)
by
peter zhu
on Wed, Apr 29 2009
How to check if all component pins are connected in ConceptHDL.
One important check step for schematic design is component pin connection check. It will check all component pins are connected other than pins that are placed with NOCHECK symbol, like ORCAD capture. But it seems ConceptHDL can not do such important check in CheckPlus. Also it seems there is no NOCHECK...
Posted to
PCB Design
(Forum)
by
peter zhu
on Wed, Apr 29 2009
ConceptHDL inter-page connection
I really hate Concept HDL, but I have to use it because of company process. From schematic design view, ORCAD is a perfect tool, although some functions needs to be improved. From library/symbol management, design file management, signal connecting, component annotation, etc, Concept HDL is a very very...
Posted to
PCB Design
(Forum)
by
peter zhu
on Wed, Apr 29 2009
Page 3 of 5 (43 items)
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