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DAC,Common Power Format

  • Designer View – Low-Power IC Design Challenges and Solutions

    The IC physical design team at Marvell Technology Group Ltd. has a tough challenge. They're under a lot of pressure to minimize power consumption as much as possible, while getting products out the door quickly. In a recorded presentation at the Cadence web site, Murali Natarajan, senior physical...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Aug 23 2012
  • What’s Cool for Low-Power at DAC?

    Low-power design promises to be a key theme of the Design Automation Conference once again! At DAC 2012 at San Francisco's Moscone Center next week (June 4-7), if you need to cover design, implementation and verification of this important subject, there's a lot to choose from at Cadence's...
    Posted to Low Power (Weblog) by Pete Hardee on Wed, May 30 2012
  • 8 Users Compare RTL Compiler (RC) vs. Design Compiler (DC) on DeepChip.com

    It was refreshing to see what happened when John Cooley made his latest request for reader feedback on his popular DeepChip website catering to the semiconductor design community. A request had come in from a previous DeepChip post prior to the Design Automation Conference (DAC) as follows: Are there...
    Posted to Logic Design (Weblog) by David Stratman on Mon, Jun 20 2011
  • Low Power Design -- Alive and Well at DAC

    Low power design was undoubtedly one of the themes of DAC this year -- especially at the Cadence booth. We drew lively interest on the DAC floor with our low power demo station, which was continuously busy especially on the free Monday. We were showing a new demo explaining how advanced low power techniques...
    Posted to Low Power (Weblog) by Pete Hardee on Tue, Jun 14 2011
  • GUC User Presentation at DAC: How to Do Low Power Design

    Power was clearly a hot topic at the recent Design Automation Conference (DAC). Many companies demonstrated their unique tool capabilities to address power issues at different abstraction levels. However, we saw very few presentations that offered a user perspective on how they do low power designs and...
    Posted to Low Power (Weblog) by QiWang on Mon, Jun 13 2011
  • New Proof Points for CPF-enabled Cadence Low Power Solution

    As the clock for the 48 th Design Automation Conference (DAC) ticks away, we at Cadence are scrambling to put the final touch-up on all our DAC activities. Even though my time is limited, I still would like to highlight the significance of two recent and seemingly unrelated events. First is a post at...
    Posted to Low Power (Weblog) by QiWang on Fri, Jun 3 2011
  • Low-Power Workshop Advances Power Format Interoperability

    Design teams concerned about managing two different power formats will find some relief July 26, 2009. That’s the date of a Low Power Coalition (LPC) workshop that will present some ongoing work aimed at interoperability between the Common Power Format (CPF) and P1801 (Unified Power Format). The...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Jul 6 2009
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