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Send Yourself A Copy
Circuit Design
16.3
7 segment
7447A
ADE
ADE-GXL
ADE-L
ADE-XL
AMS Simulation
analog
BCD
Bleasdale
Block-level simulation
bypass capacitor
Chip-level simulation
Circuit simulation
ConceptHDL
Cusstom IC Design
Custim IC Design
custom design technology
Custom IC Design
Electrical validation
Electromagnetic (EM)
Electromagnetic analysis
Harmonic Balance
IC 6.1
ipad
ipad schematics
mixed signal
mixed-signal
mixed-signal simulators
MMSIM
MMSIM71
Modeling
MSP430
optimization
Parasitic analysis
PLL
power supply
PSpice
pspice for ipad
PSS
reuse modules
RF Block Simulation
RF design
RF designer
RFIC
schematics capture for ipad
scripts
Simulators
SKILL
Spectre
Spectre RF
spectreRF
spice for ipad
tablet schematic design
Test
Virtuoso
Virtuoso Analog Design Environment
Virtuoso IC 6.1.3
Virtuoso Passive Component Designer
Virtuoso PCD
Virtuoso RF Designer
Virtuoso Spectre
Virtuoso Spectre Simulator GXL
Virtuoso Spectre Simulator XL
ViVA
voltage regulator
wireless integrated circuit verification
not able to design 7447A 7segment IC in Pspice
I tried to design a circuit using 7447A IC the 3 connections - LT, RBI and RBO are in active low. I am not able to get valid output. What should be the inputs to these 3 connections to get a valid ouptut? I have not been able to get any help regarding this on the net. They all talk of 7447 with 16 pins...
Posted to
Cadence Academic Network
(Forum)
by
tushi
on Fri, Dec 2 2011
Spicy Schematics for iPad - great for students, engineers, and professors!
Spicy Schematics has gone through a few revisions and has some great new features! Create circuits with your fingers then save as, share with one-click via email or upload to the Spicy Schematics Online Circuit Library where others can download, and make screenshots for presentations ... use the group...
Posted to
Cadence Academic Network
(Forum)
by
EdPat
on Thu, Nov 3 2011
Voltage stays on when power is removed
Hello all, I designed a prototype circuit for my MSP430 and other components. It is powered by two voltage regulators and a current source. What confuses me is that after I remove the battery power (4.2V) from the circuit, it does not turn all the way off. V+ drops to 500mV and then drops so slowly that...
Posted to
PCB Design
(Forum)
by
jmh1022
on Tue, Oct 18 2011
Modifying $Location in Concept using a script
We set a prefix to our components in a design based on sheet number. Is anyone aware of an existing Concept HDL script to modify the location property? We use reuse blocks so this would need to be done at with occurance edit mode enabled. This is iniatially set by using the ref des pattern feature during...
Posted to
PCB Design
(Forum)
by
mabo60
on Thu, Sep 22 2011
Spicy Schematics - Now with Spice Simulation
Hello everyone .. I wanted to let you know about a new application I just got approved for the app store, it is the first iPad app for creating circuit schematics and running spice simulations! The best part is that it outputs spice formatted netlists from the schematics you design, and you can email...
Posted to
PCB Design
(Forum)
by
EdPat
on Thu, Apr 28 2011
Analog Design vs. Automation -- Why Are They At Odds?
Back in 2002 and 2003 there was a lot of talk about analog synthesis being the "next new thing" to close the productivity gap between analog and digital designers. Well, I hope you didn't hold your breath for this! That promise failed mostly because analog design was still a custom design...
Posted to
Custom IC Design
(Weblog)
by
Nigel
on Tue, Aug 17 2010
New Time-Saving Feature in IC6.1.4 ISR2: Plot S-Parameter Data Directly From ViVA!
If you haven't heard about it....there is a new feature in IC6.1.4 ISR2 which makes troubleshooting circuits containing nports ( s-parameters ) much easier and faster! Starting i n IC6.1.4 ISR2, you can now plot s-parameters directly in ViVA (without having to create a test bench and run a Spectre...
Posted to
RF Design
(Weblog)
by
Tawna
on Thu, May 20 2010
Analog Behavioral Modeling - What Language Do You Speak?
An increasing number of mixed-signal design teams are contemplating adding analog behavioral modeling to their repertoire in order to achieve reasonable simulation speeds. Utilizing analog behavioral models can yield simulation performance improvements that can make full chip verification a reality....
Posted to
Custom IC Design
(Weblog)
by
MS Guy
on Tue, Mar 2 2010
NPORT S-Parameter Model Enhancements
In MMSIM 7.2, two new parameters have been added to the Spectre nport primitive: datatrunc and causality . In MMSIM 7.1, passivity checking was added. The nport now has causality correction, passivity checking and enforcement, and the ability to remove small couplings terms from the input s-parameter...
Posted to
RF Design
(Weblog)
by
Tawna
on Wed, Dec 30 2009
Getting a Feel for RF
It was a delight when I read the blog by Bill Schweber of TechOnline's RF DesignLine titled “ Getting some basic RF experience ”. I was surprising pleased that somebody took the time to talk about how one might get the feel for RF. That is because what Bob talks about is more or less...
Posted to
Custom IC Design
(Weblog)
by
TomC
on Wed, Apr 29 2009
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