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CadenceRC area report gate NAND

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  • How to report leaf cell area

    Hi: I am using RTL Compiler to report my chip area, but I found it doesn't show the leaf cell area and library area (ex:memories with lib file) ex: dm/dspm/pram0 is a read in memory lib file, but it is missing in my area report file. I have specified -depth to 10 and it is deep enough to report that...
    Posted to Logic Design (Forum) by tompy on Mon, Dec 19 2011
  • CadenceRC area report

    Hi, I've got a area report for my design. Gate Instances Area Library ------------------------------------------ FD1QLLP 15 423.612 CORE9GPLL FD1SQLLP 1 34.292 CORE9GPLL HA1LL 14 254.167 CORE9GPLL IVLLX05 2 8.069 CORE9GPLL ------------------------------------------ total 32 720.140 Could anyone tell...
    Posted to Logic Design (Forum) by Hava on Wed, Sep 30 2009
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