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Cadence,PDK

  • ARM TechCon: Inside Story of a 14nm FinFET Tapeout

    The next frontier in semiconductor design is the 14nm process node, and it will come with a new type of transistor, the FinFET. 14nm FinFET technology moved closer to reality at the ARM TechCon conference Oct. 30, 2012, where a Cadence sponsored technical session announced a 14nm test chip tapeout using...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Oct 31 2012
  • TSMC Forum: An Update on 20nm, 3D-IC, and 16nm FinFETs

    TSMC, the world's largest semiconductor foundry, is thinking big when it comes to next-generation process technology. At the TSMC Open Innovation Platform (OIP) Ecosystem Forum Oct. 16, TSMC described reference flows for 20nm and for multi-die integration, and revealed that ARM and TSMC are working...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Oct 17 2012
  • Webinar: Cadence, Mentor Find Common Ground on PDK Standards

    Representatives of Cadence and Mentor Graphics don't often appear in the same webinar, but there's a new development in the industry that was important enough to bring these two EDA vendors together Dec. 7. That development is OpenPDK , a process design kit standardization effort launched by...
    Posted to Industry Insights (Weblog) by rgoering on Sun, Dec 12 2010
  • ARM libraries, IBM PDK, Cadence PVS questions...

    Hi all, I have several questions regarding ARM libraries, IBM PDK, and Cadence PVS. Sorry if I posted in the wrong place ARM Libraries 1. Has anyone used it before? Does it have layout view for Cadence Virtuoso tool IBK PDK 1. After I installed it, I got the following warning message in Virtuoso CIW...
    Posted to Custom IC Design (Forum) by weiz on Wed, Apr 29 2009
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