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CPF

  • Q&A Interview: Chi-Ping Hsu Describes 5 Cadence Initiatives

    Chi-Ping Hsu is senior vice president of research and development for the Cadence Implementation Products Group. He is responsible for analog design and verification, digital implementation and signoff, mixed-signal design and implementation, physical verification, DFM, and PCB and package design. In...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jun 25 2009
  • Power-Aware Design -- Time To Move Beyond Formats

    Magma Design Automation’s recent announcement that its Talus IC implementation suite now reads and writes the Common Power Format (CPF) is a welcome move. But the real challenge of low-power design is not a question of formats – it’s about building a cohesive ESL-to-tapeout power-aware...
    Posted to Industry Insights (Weblog) by rgoering on Mon, May 4 2009
  • Ah, Power! Now Can I Drive?

    Last week a large number of customers and potential customers attended the “System-level Design & Chip Architecture for Low-Power ICs Techtorial and Workshop” sessions in Irvine, San Diego, and San Jose. They must have been monitoring sub-space communication channels or read this blog...
    Posted to Logic Design (Weblog) by Mike Carrell on Fri, Apr 24 2009
  • Can’t Wait To Try Power Management in the New InCyte Release?

    Coming up next week are several techtorial events, called " System-level Design & Chip Architecture for Low-Power ICs Techtorial and Workshop ". Yes, that's a keyboard-full of words. But the concept is simple. The main focus is on Power – from system-level to chip architecture...
    Posted to Logic Design (Weblog) by Mike Carrell on Fri, Apr 3 2009
  • New InCyte v3.5 Let’s You Manage Power, Without Being the “Power Expert”

    Quantify the trade-offs of Power Management techniques in Early Chip Planning with the new v3.5 release of Chip Planning Solutions . The Chip Planning Solutions team, who comes to Cadence via acquisition of ChipEstimate.com about one year ago, has just released a new version of InCyte . You may be familiar...
    Posted to Logic Design (Weblog) by Mike Carrell on Fri, Apr 3 2009
  • Don't Let Power Kill Your Project

    By Diego Hammerschlag Sr. Technical Leader Team FED Power has gone from an imminent threat to the cause of multiple projects across several vendors going under. I have heard of multiple projects that had working RTL prototypes and were far into the backend flow only to find out that the power used would...
    Posted to Logic Design (Weblog) by Team FED on Tue, Mar 31 2009
  • New Features In CPF 1.1

    This is a guest post by Qi Wang, Sr. Architect for the Cadence Low Power Solution, providing more information on what is contained in the recently-announced CPF version 1.1 . There are many major improvements in the new Si2 CPF version 1.1, and I would like to provide more details on a few of them: Complete...
    Posted to Logic Design (Weblog) by Team FED on Tue, Mar 17 2009
  • Pretty Scary, Huh Kids?

    In honor of Halloween, here are some horror stories about low power bugs. These are real bugs at real customers that would have led to real dead chips. Horror story #1: It was a dark and stormy night… Ok, it was around lunch time. But a customer had just spent three weeks coding a UPF file to...
    Posted to Logic Design (Weblog) by Rich Owen on Thu, Oct 30 2008
  • Demo: Power Shut-Off (PSO) Verification in Incisive

    With more and more designs employing low power design techniques, the need to accurately verify these low power structures is critical. Unfortunately, the complexity associated with low power design often increases the complexity of low power verification. The good news is that the Incisive Unified Simulator...
    Posted to Logic Design (Weblog) by Mickey on Wed, Oct 29 2008
  • The History of CPF

    I’ve shied away from getting into the power format wars – honestly, the whole question kind of bores me. I think everyone can agree that specifying your power intent in a single file that drives all the tools in the flow is a good thing. The specifics of which create_power_domain is used...
    Posted to Logic Design (Weblog) by Rich Owen on Mon, Oct 27 2008
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