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  • Is Power A Constraint?

    As I’ve mentioned, I have done chip design for many years. And one thing I learned early was the concept of Golden RTL – the idea that the final chip netlist MUST match the final RTL. Now, this can lead to certain anal-retentive behaviors. One rule we had was if we had to modify the RTL late...
    Posted to Logic Design (Weblog) by Rich Owen on Mon, Oct 6 2008
  • Low Power: Free Stuff is Good Stuff

    Being both old and an engineer, I’m cheap. I really like free stuff. So, here are a few things you might find useful. And free. Si2 has just recently approved Common Power Format (CPF) v1.1. This represents the third generation CPF standard, incorporating lessons and requirements learned over the...
    Posted to Logic Design (Weblog) by Rich Owen on Thu, Oct 2 2008
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