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TLM: The Year in Review, and Trends for 2012
2011 was my first full year in the land of Transaction-Level Modeling (TLM) design and verification, after spending my entire career to that point in RTL. I made my move upward in abstraction level in mid-2010 because it seemed like the time had finally come for this methodology to start becoming mainstream...
Posted to
System Design and Verification
(Weblog)
by
Jack Erickson
on Mon, Jan 2 2012
How Will High-Level Synthesis Affect the Make vs. Buy vs. Re-use Decision?
During the planning phase for SoC designs, teams have to choose whether to "make or buy" the pieces of IP that will compose the SoC. The drivers of this decision are well-chronicled in a recent article by Ann Steffora Mutchler, appropriately titled "Make vs. Buy". I won't re-hash...
Posted to
System Design and Verification
(Weblog)
by
Jack Erickson
on Tue, Nov 22 2011
17M Gates in 8 Months with 2 Designers -- What is Your ROI for Higher-Abstraction Design and Verification?
In their presentation at the recent SystemC Japan conference, Renesas Micro Systems, Inc. (RMS) stated 2 SystemC "beginners" completed a 17M gate design in 8 months, achieving first-pass timing closure at 650 MHz targeting 40nm. Two thoughts came to my mind: Wow! What is their ROI of migrating...
Posted to
System Design and Verification
(Weblog)
by
Jack Erickson
on Tue, Oct 4 2011
System Development Suite - Connecting Software to Hardware Design and Verification
I've been at CDNLive! EMEA watching demos of the newly announced System Development suite, and it's mindblowing. I'm seeing good old ncsim running Android interactively on the Virtual System Platform. You open an app in the virtual Android interface and you can stop the software, or even...
Posted to
System Design and Verification
(Weblog)
by
Jack Erickson
on Mon, May 9 2011
System Industry Trends - 2010 Highlights and What's Coming Up for 2011 (Part II)
2010 was a very dynamic year for the electronic systems industry overall and Cadence in particular. In this set of blogs, I discuss some of the trends that started in 2010 and will continue in 2011. In part I, I talked about the key growth market, key industry challenges and the role of EDA. In this...
Posted to
System Design and Verification
(Weblog)
by
Ran Avinun
on Tue, Dec 28 2010
System Industry Trends - 2010 Highlights and What's Coming Up for 2011 (Part 1)
2010 was a very dynamic year for the electronic systems industry overall, and for Cadence in particular. In the next couple of blogs, I would like to focus on some of the trends that started in 2010 and will continue in 2011. In this blog (part I), I will talk about the key growth markets, key industry...
Posted to
System Design and Verification
(Weblog)
by
Ran Avinun
on Thu, Dec 16 2010
Making an EDA360 System Realization Investment Through Standards Support
Cadence is a sponsor of the Open SystemC Initiative (OSCI) standards organization. We are providing finanical and leadership resources to facilitate the creation and promotion of standards for system development. We continue to invest in OSCI and its activities because we believe in its importance, and...
Posted to
System Design and Verification
(Weblog)
by
Steve Brown
on Thu, Jun 3 2010
Moving Past The Missing Model Syndrome
One of the issues that has hindered the progress of using Virtual Platforms for early software development is missing models. I recall seeing Axys Design's Maxsim tool back around 2001 and thinking how cool it was. All the user had to do was drag and drop models and wire them together to create a...
Posted to
System Design and Verification
(Weblog)
by
jasona
on Thu, Feb 18 2010
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