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  • Failed to open shared object file.

    We have ICFB5.1.41 installed on RHEL6.5. ASSURA version is 4.1_USR4_HF6. We get the error shown in the attached image and the Assura menu does not show up in Virtuoso Layout. Any ideas on how to tackle this issue? The GCC version we have installed is 4.4.7. I doubt if the 4.4.7 is backward compatible...
    Posted to Custom IC Design (Forum) by Xegotronix on Mon, Sep 15 2014

    Hi all, Please can someone help me with assura to PVS conversion? So how can I convert drc, erc and lvs rule files from one tool to another? Thanks for your advice.
    Posted to Custom IC Design (Forum) by Martin Kovac on Sat, Jul 26 2014
  • Device positions from Assura LVS?

    Hi. Does Assura LVS output the position (or bbox) of matched devices? I was hoping to find it in the layout netlist, but only a couple of parameters such as length and width are present. I would appreciate your help. Thanks. Chris
    Posted to Custom IC SKILL (Forum) by ChrisEAS on Thu, May 8 2014
  • ASSURA LVS RUN failure: asks OA22.41.010 API

    Hi everyone, I have been struggling with ASSURA LVS, The DRC runs fine however when LVS is run, the following error appears in the error log: Error: failed to initialize OpenAccess because: Requested minor API version '202' which is supported by OpenAccess build '22.41.010' is newer than...
    Posted to Custom IC Design (Forum) by Usama Awais on Sat, Feb 8 2014
  • LVS assura error "Unbound Pin"

    Hi, I'm currently completing my first layout, and getting errors on all my pins. When I run LVS I am getting an error on each saying "Unbound Pin". I have simply placed the pins that were automatically generated in layout XL (when I generated the layout from schematic) within the appropriate...
    Posted to Custom IC Design (Forum) by KipD on Tue, Feb 4 2014
  • Extraction AS/AD in Assura RCX

    Hello. I have a trouble with RCX extraction. After running RCX (output format is Extracted View ) AS/AD, PS/PD parameters in my MOSFETs is zero. However when output format is LVS Extracted View all parameters are correct. Parameter ExtractMOSDiffusionAP=t when running RCX. What I must to do, that AS...
    Posted to Custom IC Design (Forum) by TiNat on Mon, Oct 21 2013
  • Assura, LVS net mismatch but net doesn't exist

    Hi. The messages given to me by Assura use names of devices and nets that I didn't assign. I assume that they are assigned by Assura and that there's a way to search for these nets but I haven't found it. Example names include nets: avC3, avC5. Example devices: avD20_1. Zooming in and/or...
    Posted to Functional Verification (Forum) by TSmilkstein on Tue, Oct 15 2013
  • An urgent problem with the design rule check using Assura

    When I use Assura to do the design rule check after I have done layout using the C35B4 technology in Cadence, there is always a following probleme: [1] #INFO: C35B4/C35B3 ASSURA DRC DECK(REV9 DATE 26-Apr-2011) Last modified 15-Jun-2012. does anyone know why? Thank you advance for you response.
    Posted to Custom IC Design (Forum) by UUinfini on Fri, Jun 14 2013
  • compatibility of Assura 3.1 for 65 nm process

    Hi, I have been using Assura 3.1 for DRC,LVS and extraction for 0.35 um cmos process and now we have been using 65 nm process. Does this Assura is capable for DRC, LVS and including extraction for 65 nm cmos process.
    Posted to Custom IC Design (Forum) by Jithin on Sat, May 25 2013
  • Assura: Include other files

    Hi everyone! Is it possible to split up an Assura rule file into several subfiles and include them into the main rule file which is loaded by the RSF-file? Calibre provides this feature and I really appreciate it for a clear structure. Thanks in advance! Regards!
    Posted to Custom IC Design (Forum) by PekkaH on Thu, Oct 4 2012
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