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Send Yourself A Copy
Analog,webinar
20 nm
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Cadence and IBM Outline 20nm Custom/Analog EDA Flow Requirements
No 20nm IC design "solution" is complete without a custom/analog flow that can develop standard cells and analog/mixed-signal IP blocks. That custom/analog flow requires some changes to keep up with 20nm challenges such as double patterning and layout-dependent effects (LDE). A good overview...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, May 9 2012
Webinar Report: Power-Aware Mixed-Signal Verification
Most of the discussion about low-power design techniques has focused on digital circuits. However, nearly all systems-on-chip (SoCs) are mixed-signal, and the way in which analog and digital circuitry interact has a huge impact on overall power consumption. Thus, low power (or "power aware"...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Jan 25 2012
Webinar Report – New Approaches to Mixed-Signal Verification and Assertions
Nearly all systems-on-chip (SoCs) are mixed-signal, and as complexity grows, new verification techniques are needed. No longer is it sufficient to use traditional analog and digital simulation in isolation - instead, information must flow freely between analog and digital domains to allow a true mixed...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Jan 19 2012
Webinar Report: Solving Mixed-Signal Power Grid Challenges
Complex analog/mixed-signal ICs pose many power grid design and analysis challenges. Unanticipated IR drop and electromigration problems are commonplace, and they significantly impact circuit behavior. But as a recently archived webinar shows, there are a number of ways to minimize these problems, even...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Jan 11 2012
Webinar: Bringing Digital Verification Methodologies to Mixed-Signal SoCs
It's fairly straightforward (albeit slow) to verify an analog IP block using a Spice simulator. But when that block goes into a mixed-signal system-on-chip (SoC), and the time comes for chip-level verification, a different approach is needed. A recently archived Cadence webinar shows how advanced...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Sep 28 2011
Webinar: Solar Power Management Chip Challenges Mixed-Signal Tools
Real-world examples of mixed-signal design and verification are always interesting, especially when the end product may have a significant impact on society. That's the case with Triune Systems , a fabless semiconductor provider that has developed a chip that can maximize the power output of a photovoltaic...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Thu, Feb 17 2011
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