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Analog,mixed signal design

  • Re: mixed signal simulation

    thanks for your valuable guidance.... sir, in my project i have designed one block in verilog.Now i need to integrate it to the remaining analog blocks. so i generate verilog netlist of the corresponding digital block. But after integrating it with analog block i need to check functional and transistor...
    Posted to Mixed-Signal Design (Forum) by KUMARJAYA on Thu, Jul 17 2014
  • mixed signal simulation

    is it possible to simulate verilog netlist in cadence virtuoso?how to bind the standard netlist cell to the corresponding code?
    Posted to Mixed-Signal Design (Forum) by KUMARJAYA on Wed, Jul 9 2014
  • Vhdl-ams beginner

    Hi, I'm really new in vhdl-ams, I write my firsts codes in this langage and I have some issues to understand some basics of this extension. My tutor want me to describe an analogic comparator and test it with a ramp waveform. A schema of this circuit is in attachment. I don't know how to connect...
    Posted to Mixed-Signal Design (Forum) by sebgimi on Tue, Feb 11 2014
  • Re: Switched Cap based System Noise Analysis

    Hi Andrew, Thank you for being always first to answer. I referred your attachment before putting my query. But this says, it takes only one clock. In my system multiple switchings are happening and that too at different rates. Pardon my ignorance if I am not able to understand the material you attached...
    Posted to Mixed-Signal Design (Forum) by Abhishek D on Mon, Feb 10 2014
  • Designing Digital FIR Filter using Cadence Tools

    Hello everyone, I am required to design FIR filter using Cadence tools for one of the projects that I am currently doing. I would like to mention that I am very new to this and have never done filter designing in cadence. Even have very minimal experience in Filter design in MATLAB. Thats why I am not...
    Posted to Mixed-Signal Design (Forum) by indra0804 on Wed, Jul 3 2013
  • CADENCE capacitor corners max min typ meaning

    Hi all, Please anyone can tell me what is the meaning of max, min, and typ for capacitors corners. I understand that the parameters ss or ff corresponds to the mobility ( slow slow, fast fast) of the electrons in MOS devices. But i don´t understand what are the changes in the model of the capacitors...
    Posted to Mixed-Signal Design (Forum) by Ricardo Alves on Mon, Jun 17 2013
  • Virtuoso Verilog Environment for NC-Verilog integration

    Hi all, Through Virtuoso Verilog Environment for NC-Verilog Integration ,I initialize a analog design ,then setup netlist explicitly option to ture. I hope to generate that the netlister used the pin name method as following . The result is out of my expectation. some part of netlist remain the pin order...
    Posted to Mixed-Signal Design (Forum) by Provence on Wed, Jun 5 2013
  • Mixed-Signal Technology Summit in Japan Provides Technology Updates

    Japan’s semiconductor industry is undergoing a significant change in recent years. We are seeing a shrinking business in SoC development while design and semiconductor companies are trying to focus more on higher profitable and differentiable products like microcontrollers and power management...
    Posted to Mixed-Signal Design (Weblog) by QiWang on Thu, Nov 29 2012
  • Mixed-Signal Gets Clear Message in China

    While most of my colleagues in the US were taking a nice break during the July 4 th week, a small group of people including me was on the road for a mixed-signal Tech-on-Tour in China. There was some debate internally on whether designers in China would be interested in such a topic. What we had experienced...
    Posted to Mixed-Signal Design (Weblog) by QiWang on Tue, Jul 10 2012
  • Cadence To Release the Industry's First Mixed-Signal Methodology Book

    The new era of “Internet Everywhere” creates a whole new spectrum of applications, ranging from health care, automotive, to entertainment and cloud computing, which demand more and more mixed-signal and low power designs. In fact, mixed-signal applications have become one of the fastest growing...
    Posted to Mixed-Signal Design (Weblog) by QiWang on Sat, May 26 2012
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