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Accellera

An Inside Look At The Unified Coverage Interoperability Standard

A standard is quietly emerging to help verification engineers deal with coverage information from different sources - and if that's a concern for you, there's still time to get involved. The Accellera Unified Coverage Interoperability Standard ( UCIS ) committee is developing a draft standard...

Posted to Industry Insights (Weblog) by rgoering on Mon, Mar 22 2010
DVCon 2010 - Day 1

Click here or on the image below to go to the photo blog of DVCon Day 1. While I've added descriptive captions to the images, allow me to address the FAQ: "How was the traffic on show floor?". My unscientific observation was that the floor was a little lighter than last year, but this was...

Posted to Functional Verification (Weblog) by jvh3 on Wed, Feb 24 2010
OVM Community Contributions: Wildly Popular And Clearly Essential

A couple of weeks ago, before going to bed one night I checked the statistics for the OVM World site. What I saw was really cool - exactly 10,000 registered users at the moment I looked! Being a social media guy these days, the first things I did was to tweet about it, and I was glad to see several re...

Posted to Functional Verification (Weblog) by tomacadence on Tue, Feb 16 2010
An Analogy: UVM Is To OVM As SystemVerilog Is To Verilog

In my last blog entry , I implored Accellera to release UVM 1.0 quickly, standardizing OVM 2.1 as is, with full backwards compatibility and without trying to cram overlapping functionaity from VMM into the base. Then they can add new functionality on top of this base, taking good ideas from OVM World...

Posted to Functional Verification (Weblog) by tomacadence on Fri, Feb 5 2010
Why UVM Does Not Equal OVM Plus VMM

In the numerous tweets, blog posts, and online forum discussions on the upcoming Universal Verification Methodology (UVM) standard from Accellera, I have seen a couple of references along the lines of "UVM=OVM+VMM" and that really concerns me. It concerns me because it's not accurate, but...

Posted to Functional Verification (Weblog) by tomacadence on Wed, Jan 27 2010
Behind Accellera’s Vote For OVM-Based Standardization

As noted in a recent Cadence blog by Tom Anderson, the Accellera Verification IP (VIP) Technical Subcomittee has voted to make the Open Verification Methodology ( OVM ) the basis of its upcoming “Universal Verification Methodology” (UVM) standard. Here are some thoughts about what this means...

Posted to Industry Insights (Weblog) by rgoering on Thu, Jan 7 2010
Happy Holidays - OVM on The Path to Standardization

I've just heard that the Accellera VIP Technical Subcommittee (TSC) has voted to make the OVM the base for their Universal Verification Methodology (UVM) standard and, in spite of the holidays, I’m so happy that I have to blog about it. When Cadence and Mentor embarked upon the Open Verification...

Posted to Functional Verification (Weblog) by tomacadence on Wed, Dec 23 2009
Accellera/SPIRIT Merger – Putting Some Excitement Into IP Reuse

Designers have been complaining about silicon IP integration and interoperability for years, but attempts to ease the challenge haven’t generated much excitement. Standards have lagged, proposals have seen slow adoption, and the Virtual Socket Interface Alliance (VSIA) has come and gone. The announcement...

Posted to Industry Insights (Weblog) by rgoering on Wed, Jun 17 2009
Q&A Interview: Chris Tice Outlines Cadence System Level Design Strategy

Chris Tice is the senior vice president and general manager for System Design and Verification at Cadence Design Systems. In this interview, he discusses upcoming and ongoing developments with transaction-level IP design, virtual platforms, embedded software verification, and system-level low power design...

Posted to Industry Insights (Weblog) by rgoering on Mon, Jun 8 2009

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Accellera

An Inside Look At The Unified Coverage Interoperability Standard

DVCon 2010 - Day 1

OVM Community Contributions: Wildly Popular And Clearly Essential

An Analogy: UVM Is To OVM As SystemVerilog Is To Verilog

Why UVM Does Not Equal OVM Plus VMM

Behind Accellera’s Vote For OVM-Based Standardization

Happy Holidays - OVM on The Path to Standardization

Accellera/SPIRIT Merger – Putting Some Excitement Into IP Reuse

Q&A Interview: Chris Tice Outlines Cadence System Level Design Strategy