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Gary Smith at DAC 2013 – the $170M SoC Design is a “Myth”
Analyst Gary Smith of Gary Smith EDA is not afraid to tackle what he sees as myths and misconceptions. At his annual night-before-DAC talk at the Design Automation Conference Sunday, June 2, he debunked a "myth" that SoC design will become too expensive for all but a handful of large companies...
Posted to
Industry Insights
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by
rgoering
on Sun, Jun 2 2013
DAC 2013 – Software Driven EDA for the “Age of Gods”
This year's Design Automation Conference is less than a week away, and it's time for my preview of what to see at DAC. Last year I had likened my passion for system-level design to the Energizer Bunny , keeping on drumming. Maybe that year was the DAC of system-level design. The trend continues...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Tue, May 28 2013
DAC 2013: User Perspectives on System-Level Verification
The best way to learn about an emerging technology is to hear from the people who are using it. If you're curious about system-level design and verification, you can do just that at the Cadence System-to-Silicon Verification Breakfast at the Design Automation Conference ( DAC 2013 ) Tuesday, June...
Posted to
Industry Insights
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by
rgoering
on Wed, May 15 2013
System to Silicon Verification – CDNLive Gives a Reality Check on How Hardware and Software Meet
Ever since switching from being a hardware/software chip developer to being an enabler with tools in EDA and embedded software, I was part of a team working towards methodologies and tools to improve the interaction of hardware and software. In December last year -- 15 years in -- I summarized a great...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Fri, Mar 8 2013
Securing Invisible Things … or “Why Denial Works!”
The opening keynote of the Embedded World conference in Germany left me with chills. No, it was not a grand theatrical performance letting me crave for more. It simply scared the bejevies out of me with respect to the safety and security of embedded devices, some of which I use each day. Luckily -- as...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Wed, Feb 27 2013
System Design 2012 – Real Users Achieving Real Results!
This morning the final success story my team has been working on for this year went live. Texas Instruments reports on how they achieved greater than 90% accurate correlation between an architectural power estimation and actual silicon! This deserves its own blog early next year, but meanwhile, it has...
Posted to
System Design and Verification
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fschirrmeister
on Fri, Dec 21 2012
Optimizing ARM Based Designs for Low Power using Emulation
The month November goes to the Brits, no question. Not only did the James Bond movie Skyfall open, but Santa Clara also experienced somewhat of a "British Invasion" for ARM TechCon in the Santa Clara convention center. To be there properly I even brought out my favorite new pin striped suit...
Posted to
System Design and Verification
(Weblog)
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fschirrmeister
on Mon, Nov 19 2012
How Many Cycles are Needed to Verify ARM’s big.LITTLE on Palladium XP?
At the recent CDNLive! India user conference, Deepak Venkatesan and Murtaza Johar representing ARM India gave a fascinating presentation called "Verifying big.LITTLE using the Palladium XP". Registered Cadence.com users can get the presentation here once the proceedings are published. ARM's...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Tue, Oct 30 2012
Changing the Game with Processor Based Emulation
I have always been fascinated by game changing moves. Some are more successful than others, but the general principle is always the same - coming with a gun to a knife fight. Two of my favorites are from sports. When I was a young rower, the moving outrigger was a game changer for a while and was a fascinating...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Thu, Oct 11 2012
User Presentation: Adapting a Specman “e” Simulation Testbench to Emulation
When Intel engineers were asked to verify one of the company's largest Many Integrated Core (MIC) designs, they faced a quandary. On one hand, they wanted the visibility and debug features provided by their Specman e language simulation environment. But they also wanted the much faster speeds provided...
Posted to
Industry Insights
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by
rgoering
on Thu, Aug 2 2012
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