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Videos, Presentations Highlight Front-End IC Design Methodologies
Want to know how other designers are solving front-end IC design challenges, and what Cadence R&D is doing to help? The Front-End Design (FED) Technology Summit, held at Cadence San Jose headquarters Dec. 6, 2012, provided some helpful answers. Presentations and videos from most of the sessions are...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Apr 9 2013
How Hardware/Software Co-Development Fuels “Product Creation”
I've written recently about "product creation," a concept that looks beyond the chip or board and considers the requirements of the entire end product, including hardware, software applications, and mechanical enclosures. These requirements ripple down through the design supply chain and...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Apr 3 2013
EDA CEOs Reveal Thoughts About Present and Future of EDA Industry
At an EDA Consortium ( EDAC ) panel discussion March 14, 2013, top executives from Cadence, Mentor, Synopsys, ARM, and EDA startup Nimbus shared their views about a range of business and technology issues facing the EDA industry. Panelists engaged in lively discussions about topics including consolidation...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Mar 18 2013
Samsung CDNLive Keynote: Innovation and Challenges in the Post-PC Era
We are living through a "disruptive" transition in which a PC-driven market is giving way to a mobile-driven market, according to Young Sohn, president and chief strategy officer for device solutions at Samsung Electronics. In a keynote speech March 12, 2013 at the CDNLive Silicon Valley conference...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Mar 13 2013
Lip-Bu Tan at CDNLive 2013: Opportunities and Challenges for Electronics, and How Cadence Can Help
Lip-Bu Tan, Cadence president and CEO, is excited about ongoing innovation within the electronics industry - but he's also aware of challenges such as advanced node lithography, complexity, time-to-market, and rising design costs. In a keynote speech at the CDNLive Silicon Valley conference March...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Tue, Mar 12 2013
CDNLive Paper Preview: RTL Performance Analysis of ARM Interconnect IP
System on chip (SoC) interconnect must meet the performance requirements of increasingly demanding, complex chips -- but traditional modeling and verification techniques don't shed much light on bandwidth and latency. A new approach to analyzing and debugging performance with ARM system IP (interconnect...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Mon, Mar 11 2013
CDNLive High-Performance Track: Do You Have What it Takes to Get Your High-Performance SoC to Market?
Implementing SoCs with embedded processors at advanced nodes has become increasingly difficult. This is due to the complexity of the design functionality as well as the low power and increased performance requirements driven by a plethora of end-user applications in modern hand-held devices. Path-breaking...
Posted to
Digital Implementation
(Weblog)
by
Vasu Madabushi
on Sun, Mar 10 2013
System to Silicon Verification – CDNLive Gives a Reality Check on How Hardware and Software Meet
Ever since switching from being a hardware/software chip developer to being an enabler with tools in EDA and embedded software, I was part of a team working towards methodologies and tools to improve the interaction of hardware and software. In December last year -- 15 years in -- I summarized a great...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Fri, Mar 8 2013
Video: What the Newly Approved IEEE 1801-2013 Low Power Format (UPF 2.1) Includes
The IEEE RevCom (Review Committee) approved a new version of the IEEE 1801 low power format, also known as the Unified Power Format (UPF), March 5. The new version is IEEE 1801-2013 or UPF 2.1. It's a significant step towards "methodology convergence" with the Common Power Format (CPF)...
Posted to
Industry Insights
(Weblog)
by
rgoering
on Wed, Mar 6 2013
Securing Invisible Things … or “Why Denial Works!”
The opening keynote of the Embedded World conference in Germany left me with chills. No, it was not a grand theatrical performance letting me crave for more. It simply scared the bejevies out of me with respect to the safety and security of embedded devices, some of which I use each day. Luckily -- as...
Posted to
System Design and Verification
(Weblog)
by
fschirrmeister
on Wed, Feb 27 2013
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