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ARM,EDA360

Interconnect Workbench Eases Analysis and Verification for ARM-Based SoCs

In today's complex SoCs, early performance analysis and verification of SoC interconnect is crucial. Architects must ensure that interconnect will meet the bandwidth and latency requirements of the target application, while verification engineers must build a testbench that assures functional correctness...

Posted to Industry Insights (Weblog) by rgoering on Tue, Oct 9 2012
CDNLive! – Lip-Bu Tan Keynote Cites Semiconductor Growth Drivers

CDNLive! Silicon Valley , the annual Cadence U.S. user conference, opened in San Jose, California March 13, 2012 on an optimistic yet cautionary note. Keynote speakers from Cadence, TSMC and ARM each predicted a new era of innovation in the electronics industry, but also noted daunting challenges that...

Posted to Industry Insights (Weblog) by rgoering on Tue, Mar 13 2012
EDA CEOs Speak Out: 3D-ICs, IP Integration, Low Power, and More

What's driving the EDA industry today and where is it headed in the near future? Some high-level answers to these questions came from the EDA Consortium (EDAC) annual CEO Forecast panel Feb. 29, 2012. EDA industry leaders shared their views about 3D-ICs, SoC integration, power management, industry...

Posted to Industry Insights (Weblog) by rgoering on Mon, Mar 5 2012
2012 CES: Top 3 Trends Impacting EDA This Year

For years now consumer electronics have driven (nay, saved) the EDA industry. Hence, many events at last week's annual Consumer Electronics Show (CES) in Las Vegas can be extrapolated as leading indicators for the EDA business. While I couldn't personally attend CES this year, I had two trusted...

Posted to Functional Verification (Weblog) by jvh3 on Tue, Jan 17 2012
Report on ARM Techcon 2011: Real and Virtual Software Apps, High-Speed Silicon and Lego Hardware

The acid test of any conference is how long the information and lessons learned linger in your mind after the keynotes, panels, and demos wrap up. Like last year, the 2011 edition of ARM Techcon is passing the test of time. Below are some of the highlights that have stuck with me and/or have been prompted...

Posted to Functional Verification (Weblog) by jvh3 on Tue, Dec 13 2011
ARM TechCon: Q&A With Lip-Bu Tan, Cadence CEO

What kind of collaboration does the semiconductor industry need now? How can we get more venture capital money into semiconductors? Is there a future for EDA in the cloud? These are a few of the questions asked by Simon Segars, executive vice president and general manager of ARM, of Lip-Bu Tan, president...

Posted to Industry Insights (Weblog) by rgoering on Thu, Oct 27 2011
Virtual Platform for Xilinx Zynq – Why “Extensible” Matters

You would expect a unique semiconductor product to have a unique software development environment. That is the case with the Xilinx Zynq-7000 family, an Extensible Processing Platform (EPP) that includes a dual-core ARM Cortex-A9 processor and a 28nm FPGA fabric. Today (Oct. 26, 2011) at ARM TechCon...

Posted to Industry Insights (Weblog) by rgoering on Wed, Oct 26 2011
GTC Panel: CEOs Navigate a Changing IC Ecosystem

Semiconductor and system design have never been more promising -- or more challenging. How can IC design companies find their way to sucess? At the Global Technology Conference (GTC) Aug. 30, three CEOs and one vice president gave their perspectives on the rapidly changing IC design and manufacturing...

Posted to Industry Insights (Weblog) by rgoering on Thu, Sep 1 2011
Video: Duolog at DAC 2011 Update – Automating Design and Verification IP Integration

One of the key tenants of the EDA360 vision is the need for scalable, correct-by-construction IP creation and integration of design and verification IP. Duolog is in the vanguard of creating automation to address this challenge, and in this video update Duolog's CTO Dave Murray notes new capabilities...

Posted to Functional Verification (Weblog) by jvh3 on Sun, Jun 26 2011
Image Gallery: Cadence-Denali Party at DAC 2011 in San Diego

The 20nm roadmap . TSMC reference flow 12 . The UVM 1.1 release . Verification IP for ARM ACE . Assertion-driven simulation . All of these important items were key EDA360 deliverables this DAC. Yet there was one thing that I dare say was the most anticipated part of the whole conference: of course, I'm...

Posted to Functional Verification (Weblog) by jvh3 on Mon, Jun 13 2011

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ARM,EDA360

Interconnect Workbench Eases Analysis and Verification for ARM-Based SoCs

CDNLive! – Lip-Bu Tan Keynote Cites Semiconductor Growth Drivers

EDA CEOs Speak Out: 3D-ICs, IP Integration, Low Power, and More

2012 CES: Top 3 Trends Impacting EDA This Year

Report on ARM Techcon 2011: Real and Virtual Software Apps, High-Speed Silicon and Lego Hardware

ARM TechCon: Q&A With Lip-Bu Tan, Cadence CEO

Virtual Platform for Xilinx Zynq – Why “Extensible” Matters

GTC Panel: CEOs Navigate a Changing IC Ecosystem

Video: Duolog at DAC 2011 Update – Automating Design and Verification IP Integration

Image Gallery: Cadence-Denali Party at DAC 2011 in San Diego