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What Does it Take to Migrate from e to UVMe?
So you are developing your verification environment in e , and like everyone else, you've been hearing a lot of buzz surrounding UVM (Universal Verification Methodology). Maybe you would also like to give it a try. The first question that pops in your mind is, "What would it take to migrate...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Wed, Sep 5 2012
Analyzing Error Reports When Specman Crashes
One of the most frustrating events while running a tool would be to experience a tool crash. In Specman you would usually see something like: *** Error: OS signal 11 (segmentation violation) received See the stack trace in ./specman.err To debug: --------- o Rerun the same test with the same seed in...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Tue, Apr 17 2012
Technical Tip on How to Use HDL Assertions in e
While assertion callbacks have existed in Specman/e for several years now, several questions on their usage have surfaced recently, so here is a short refresher on their usage. ABV (Assertion Based Verification) is, more and more, becoming an important aspect of any complete verification. HDL assertions...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Wed, Sep 28 2011
If Only Carl Friedrich Gauss had IntelliGen in 1850
The N-queens issue is a challenging but standard puzzle when it comes to the world of constraint solving. It's a generalization of the 8-queens puzzle, whose description can be found in detail in Wikipedia ( http://en.wikipedia.org/wiki/Eight_queens_puzzle .) The challenge is to place N queens on...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Thu, Aug 18 2011
Full Sequence Coverage in a Single Line of e Code?
I was asked recently about how to easily collect coverage on the sequences generated by the verification environment. Since this question has come up before, I thought I would take this opportunity to write a short blog on how to quickly and easily collect coverage on generated sequences. A comprehensive...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Tue, Jun 28 2011
Is e Old? Yes. Is it Outdated? Definitely Not!
I was at the Design Automation Conference (DAC) last week showcasing our latest, greatest Incisive Enterprise Simulator (IES) performance features in the demo suites. In my "off" time, I was in our DAC booth meeting customers and discussing our advanced verification solutions. I ran into a...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Thu, Jun 16 2011
Specman Application Note: Improving Verification Productivity With Dynamic Load and Reseeding
Are you looking for new approaches to improve your verification productivity by 40 - 60%? Look no further... read the technical application note by Corey Goss on how to Improve Verification Productivity through Adopting Dynamic Load and Reseed Methodology. Attached is a link to the application note that...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Tue, Mar 1 2011
Support for e Language Macros in Amiq DVT Tool
DVT ( D esign and V erification T ools), a product offering from a 3rd party vendor, AMIQ , is for verification engineers working with e and SystemVerilog who are dissatisfied with the limitations of plain text editors and plain text searches (grep) when reading, writing or understanding source code...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Tue, Jan 25 2011
Specman/e Users Voice Their Opinions on Benefits of e over SystemVerilog
A recent customer blog interview with Geoffrey Faurie from ST Microelectronics and Richard Goering from Cadence was posted on Cadence.com with the title: " Is e or SystemVerilog Best for Constrained-Random Verification? " This blog post has received much positive feedback from other Specman...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Tue, Jan 18 2011
Achieve the Next Level of Verification Productivity with Specman Advanced Option
Advanced verification customers are seeing their verification environments getting more and more complex requiring millions of lines of code spread across hundreds, even thousands of files that are re-used from Block --> SoC --> System level. Today's design under test (DUT) can be extremely...
Posted to
Functional Verification
(Weblog)
by
teamspecman
on Tue, Jan 18 2011
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