will be under maintenance from Friday, Oct. 3rd at 6pm (PST) thru Sunday, Oct 5th at 11pm (PST). login, registration, community posting and commenting functionalities will be disabled.
Home > Community > Tags > AMS virtuoso simulation/backannotation
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more convenient.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).


* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

AMS virtuoso simulation,backannotation

  • Re: mixed signal design flow

    Hi all, I'm also working along the same lines, and have two questions regarding simulation with this kind of mixed-signal flow. Lucky for me, I have access to the gds files, so I can run DRC and LVS on my full design in virtuoso. So no problem there. However, I'm hoping to use sdf back-annotation...
    Posted to Custom IC Design (Forum) by MzQuarter on Fri, Oct 15 2010
Page 1 of 1 (1 items)