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AMBA

Designing ARM-Based SoCs? Don’t Miss This Event!

Do you design or program systems-on-chip using ARM processors - or plan to? If so, ARM TechCon is the place to be Oct. 25-27, 2011. Cadence is the official "signature sponsor" of this year's conference and has a number of papers and activities there. I'll first provide a general overview...

Posted to Industry Insights (Weblog) by rgoering on Thu, Sep 29 2011
Verifying AMBA® 4 ACE Designs – Cadence is Ready to Help, Now

ACE is here. Are you ready? Designers of multimedia smartphones, tablets, and other mobile computing devices face greater challenges than ever. They have to deliver ever more capable and responsive systems, yet must also consume the least amount of power possible -- certainly no more than their competitors...

Posted to Functional Verification (Weblog) by PeteHeller on Mon, Aug 15 2011
Video: Duolog at DAC 2011 Update – Automating Design and Verification IP Integration

One of the key tenants of the EDA360 vision is the need for scalable, correct-by-construction IP creation and integration of design and verification IP. Duolog is in the vanguard of creating automation to address this challenge, and in this video update Duolog's CTO Dave Murray notes new capabilities...

Posted to Functional Verification (Weblog) by jvh3 on Sun, Jun 26 2011
ARM ACE Verification IP: Verifying Hardware Cache Coherency

Cache coherency is essential for any processor-based system that uses cache memory. And now, it is moving from software into hardware in multi-processor mobile devices, due to ARM's new AMBA 4 Coherency Extensions (ACE). What does that mean from a verification standpoint? Newly available verification...

Posted to Industry Insights (Weblog) by rgoering on Mon, Jun 6 2011
“Everything Assertion Based” -- Assertion-Based Verification (ABV) Comes of Age for Complete Block-Level Verification

Preface: are you having trouble (re-)igniting interest in formal, muti-engine, and Assertion-Based Verification (ABV) among your colleagues and management? If so, the following article is the perfect primer to share with such skeptics (whose knowledge of ABV might be way out of date.) Like many things...

Posted to Functional Verification (Weblog) by TeamVerify on Thu, Dec 2 2010
Verification Goldmine: 50 User Papers on Formal, Multi-Engine, and Assertion-Based Verification (ABV)

With all due respect to our Tech Pubs writers, Solutions Architects, and contributors to this blog, nothing beats hearing the experiences of end users applying a given tool or methodology to their real world challenges. Fortunately, Team Verify has been blessed with a generous and prolific community...

Posted to Functional Verification (Weblog) by TeamVerify on Tue, Nov 2 2010
Sonics Interview: AMBA Interconnect IP In The Cloud

Easier IP integration into systems-on-chip has been a long-sought goal, and is a key part of the EDA360 vision . In a Design Automation Conference interview, I learned how Sonics and Cadence are working together to provide an integration-optimized solution for AMBA interconnect IP. Sonics , a provider...

Posted to Industry Insights (Weblog) by rgoering on Thu, Aug 19 2010
ARM AMBA 4 Protocol And VIP – A Closer Look

ARM last week announced the first phase of its AMBA 4 specification, and Cadence simultaneously released Incisive verification IP (VIP) for the e language and SystemVerilog. So why is ARM releasing AMBA 4, what's in the two phases, and what's in the VIP? To get a closer look at what's in...

Posted to Industry Insights (Weblog) by rgoering on Wed, Mar 17 2010
VIP Portfolio Extension: New AMBA 4 Protocol Support

ARM-loving Specmaniacs's rejoice: we are now at liberty to announce that we are providing Verification IP (VIP) support for the new AMBA 4 protocol simultaneously with ARM’s introduction of said protocol. Here is the official announcement, which includes AMBA4 and VIP highlights . What this...

Posted to Functional Verification (Weblog) by teamspecman on Mon, Mar 8 2010

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AMBA

Designing ARM-Based SoCs? Don’t Miss This Event!

Verifying AMBA® 4 ACE Designs – Cadence is Ready to Help, Now

Video: Duolog at DAC 2011 Update – Automating Design and Verification IP Integration

ARM ACE Verification IP: Verifying Hardware Cache Coherency

“Everything Assertion Based” -- Assertion-Based Verification (ABV) Comes of Age for Complete Block-Level Verification

Verification Goldmine: 50 User Papers on Formal, Multi-Engine, and Assertion-Based Verification (ABV)

Sonics Interview: AMBA Interconnect IP In The Cloud

ARM AMBA 4 Protocol And VIP – A Closer Look

VIP Portfolio Extension: New AMBA 4 Protocol Support