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ADE,ADE XL

  • How to easily update ADE/ADE-XL testbenches with new model files?

    Hello, I just wanted to ask if there is any easy way of updating the model files in all my saved state files (ADE-L) and my ADE-XL testbenches. We recently updated the model files that we are using and the latest files now reside in a different directory. I was wondering if there is any automatic or...
    Posted to Custom IC Design (Forum) by D L on Tue, Jul 22 2014
  • Re: mixed signal simulation

    thanks for your valuable guidance.... sir, in my project i have designed one block in verilog.Now i need to integrate it to the remaining analog blocks. so i generate verilog netlist of the corresponding digital block. But after integrating it with analog block i need to check functional and transistor...
    Posted to Mixed-Signal Design (Forum) by KUMARJAYA on Thu, Jul 17 2014
  • Aging simulation with RelXpert and Eldo

    Hello everyone I would like to simulate the aging behavior on circuit-level of the circuits built by bulk-Si CMOS technology. I know that there is a tool named “RelXpert” (combined with UltraSim) in Analog Design Environment (ADE) of Cadence Virtuoso can be used for aging (NBTI and HCI) simulation...
    Posted to Custom IC Design (Forum) by SilentHunter on Sun, May 15 2011
  • TFT and BSIM device equations

    Hello everyone I am working TFT circuit design. According to Virtuoso® Simulator Circuit Components and Device Models Manual Product Version 7.1.1 June 2009, Cadence Spectre and UltraSim simulators support RPI TFT model. The equations of RPI TFT models are listed in the above file. I created the...
    Posted to Custom IC Design (Forum) by SilentHunter on Sat, May 14 2011
  • Plotting new post-simulation outputs in ADEXL

    Hi, I'm using IC6.1.3.500.11. I have a pretty simple problem which I can't seem to find the solution to. After finishing a simulation in ADE XL and changing or adding some expressions in my 'Outputs Setup' window, the new expressions are not reflected in the 'Results' tab. It...
    Posted to Custom IC Design (Forum) by blorbx on Wed, May 11 2011
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