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ADE L

  • Propagate and annotate DC operating points to schematic pcell from one level down hierarchy

    Hello, I have created a symbol which is a schematic pcell that contains one transistor one level down hierarchy. When i run DC simulation all the DC operating points (i.e. id, vgs, vds, gm, gds) and terminal voltages and current are displayed at transistor level. I'm trying to propagate and annotate...
    Posted to Custom IC SKILL (Forum) by Oleg Si on Tue, Jun 17 2014
  • Modify ADE Toolbar buttons

    Hi, Is it possible to modify the ADE toolbars in virtuoso 6.1 ? There is a directory located at 06.15.511/share/cdssetup/dfII/toolbars/byApplication" which gives the templates for the toolbars for all of the other tools (including ADEXL, ADEGXL, schematic, symbol, analogArtist_schematic), but I...
    Posted to Custom IC SKILL (Forum) by NiallDuncan on Fri, Jun 6 2014
  • Re: analogLib in cadence 6.1.5 (LNA simulation)

    Hi Marouf, You do not need an additional license to use analogLib if you have a license for Virtuoso IC6.1.5 and the Analog Design Environment. You do need to have a license to simulate spectre/aps in the Analog Design Environment. You didn't mention what version of MMSIM you are using. If you are...
    Posted to RF Design (Forum) by Tawna on Thu, May 1 2014
  • Re: Getting schematic instances from multiple open schematics

    Thanks. Both are excellent suggestions. But I'm doing this to select instances for an ADE-XL session. So I found an easier way to do this & tired using "asiSelectInst" with this code: ;get a unique form handle win = sprintf( nil "%s" hiGetCurrentWindow() ) form = concat( 'iphdcopTabForm...
    Posted to Custom IC SKILL (Forum) by shajujan on Wed, Apr 16 2014
  • RF Front end Receiver

    Hi, We are designing a RF Front end receiver in which we are proceeding with a PSS, PAC, etc analyses..... 1. We have plotted Conversion Gain Vs LO power by doing PSS followed by PAC analyses. So, can we plot the same CG by varying RF. 2. Can we plot Noise Figure Vs RF frequency. Please, get me the valuable...
    Posted to RF Design (Forum) by Kiran1507 on Mon, Jan 20 2014
  • STM065 536 Design Kit

    Hi, I am new with Cadence community I hope I get some help. I start to work on the STM065 536 design kit which support RFCMOS as well. I have a problems with the suitable model libraries that I should load in the ADE env in order to simulate some simple circuit, that for example has PMOS and NMOS of...
    Posted to RF Design (Forum) by paderborn on Fri, Jan 10 2014
  • how to plot capacitance vs voltage in cadence virtuoso

    Hi, I am designing VCO in cadence-virtuoso ADE L(180nm) topology is attached below where i have to know how to plot graph C Vs Voltage. Capacitance is parallel combination of two PMOS varactors (PM2 and PM3) and also when i simulated the ckt with 1.2V i am getting low peak to peak voltage swing how to...
    Posted to RF Design (Forum) by venkateshjutur on Mon, Nov 25 2013
  • .cdsenv parameters for viva

    Hi, Where can I find a list of all parameters that I can use as default startup parameters for Viva? I am assuming, after reading related posts, that they can be written up in .cdsenv and ADE Viva should be able to see it while displaying graphs. Thanks in anticipation.
    Posted to Custom IC SKILL (Forum) by Asavanth on Thu, Jan 10 2013
  • Change the default ADE-L window size in IC6.1.5?

    I'm using IC6.1.5 and I've added a custom menu to the ADE-L window, but now some of the menu choices are hidden (a little >> indicator shows next to the Cadence logo) and if the window size is expanded slightly all the menu choices become visible. I've tried to figure out from which...
    Posted to Custom IC SKILL (Forum) by SharksFan on Wed, Jan 9 2013
  • asiGetStimulusGlobals is only valid after calling ADE - Setup->Stimuli...

    asiGetStimulusGlobals methods only works if you prev. called dialog "ADE - Setup->Stimuli...". Is there any workaround for that? How can I get the global nets of current design? I am using Virtuose 6.1.5 Michael
    Posted to Custom IC SKILL (Forum) by MLindig on Fri, Aug 10 2012
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