Home > Community > Tags > 5.1.14/netlist
 
Login with a Cadence account.
Not a member yet?
Create a permanent login account to make interactions with Cadence more conveniennt.

Register | Membership benefits
Get email delivery of the Cadence blog (individual posts).
 

Email

* Required Fields

Recipients email * (separate multiple addresses with commas)

Your name *

Your email *

Message *

Contact Us

* Required Fields
First Name *

Last Name *

Email *

Company / Institution *

Comments: *

5.1.14,netlist

  • Exporting files

    Hello, Is it possible to export my spectre netlist file generated from my schematic into another environment so that I could use it as an input file for matlab and visual c++? Thx!
    Posted to Custom IC Design (Forum) by EveBell on Wed, Apr 27 2011
  • Encounter Netlist files

    Hello! If I have a transistor level schematic and my simulations show that my circuit is working correctly in virtuoso, how can I generate the verilog netlist and source code to be imported/included for Encounter to design the layout? Thanks in advance!
    Posted to Custom IC Design (Forum) by EveBell on Tue, Mar 29 2011
  • Import spectre netlist

    Hello all, I have to look for real differences of subcircuits in two spectre netlists. It should be the same circuit, but the names of the nets and instances seemes to be compleetly different. My idea is to cut out the parts of the subcircuits definition, import them to a cell (IC5.141) and use the LVS...
    Posted to Custom IC Design (Forum) by Bernd das Brot on Fri, Jan 8 2010
Page 1 of 1 (3 items)