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3DIC,3D IC,Reiter

  • Panelists: What Needs to Happen for 3D-IC TSV Success

    It's time to get to work if we want to bring 3D-ICs with through-silicon vias (TSVs) into the semiconductor design mainstream. What ecosystem support is needed in the short term, medium term, and long term to make this new technology successful? That's the question that was put to a panel of...
    Posted to Industry Insights (Weblog) by rgoering on Wed, Apr 11 2012
  • EDA Symposium: Users Cite 3D-IC Design Tool Needs

    What's needed to bring 3D-ICs with through-silicon vias (TSVs) - or 2.5D ICs with silicon interposers - into the IC design mainstream and volume production? That question resonated through a day-long session on 3D-ICs at the Electronic Design Processes Symposium ( EDPS ) April 6, 2012 in Monterey...
    Posted to Industry Insights (Weblog) by rgoering on Mon, Apr 9 2012
  • Two New Resources for 3D-IC Design

    Just in time for the Design Automation Conference (DAC), two new publications are providing fresh perspectives about 3D-IC design. First, the Global Semiconductor Alliance ( GSA ) has released a "3D-IC Design Tools and Services Tour Guide" for next week's DAC. Secondly, a new Cadence technical...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Jun 2 2011
  • IEEE Workshop: Panelists Identify Requirements for 3D IC Adoption

    3D ICs with through-silicon vias (TSVs) are in development by a few large companies, but they're a long ways from widespread adoption. What will it take to move this technology into the IC design mainstream? Panelists at the IEEE Electronic Design Processes ( EDP ) workshop April 8 came up with some...
    Posted to Industry Insights (Weblog) by rgoering on Thu, Apr 14 2011
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