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  • Re: OrCad 16.6 Lite

    Thank you very much. That was the problem...
    Posted to PCB Design (Forum) by kmastrok on Fri, Apr 11 2014
  • Can't choose directory for netlist files

    When netlisting from Design Entry CIS for the PCB editor, the dialog box is drawn with the right side of the box including the browse button for the Netlist Files Directory obscured. It's a major painto have to type an absolute path into the box which not coincidentally doesn't show the whole...
    Posted to PCB Design (Forum) by JMinCV on Wed, Apr 9 2014
  • Default Toolbars in Capture CIS

    Does anyone know how to set which toolbars are visible by default in Capture? I would like the 'Draw' toolbar to be visible by default everytime I open the schematic editor, but have found no setting that sticks between the times I start the tool. The Capture, Part Manager, and Search toolbars...
    Posted to PCB Design (Forum) by JMinCV on Tue, Apr 8 2014
  • Routing over voids

    Does Cadence have a function to help us indentify routing over voids and splits for high speed nets we care about? If yes, where can i find it? T hanks, Patrick
    Posted to PCB Design (Forum) by patricksingr on Fri, Mar 28 2014
  • CIS DB source

    Hi all, I don't know if it is the correct section for my topic but I don't find a better place. I'm trying to use Orcad Capture CIS 16.6 (Windows 7), but I have a problem to link my part DB to my configuration file, I followed the steps shown in the guide "cisug.pdf" and added in...
    Posted to Logic Design (Forum) by dpiccardi on Tue, Mar 4 2014
  • What's Good About DEHDL’s Cross Referencing of Hierarchical Nets? 16.6 has Several New Enhancements!

    The 16.6 Design Entry HDL (DEHDL) Cross Referencer has some new enhancements to report on hierarchical nets. Read on for more details … Just a quick post this week to share with you a couple new capabilities in the DEHDL Cross Referencer. There is a new option to generate Cross References using...
    Posted to PCB Design (Weblog) by Jerry GenPart on Wed, Feb 26 2014
  • What's Good About Allegro/OrCAD/Sigrity Quarterly Incremental Releases (QiRs)? Check Out 16.6!

    You’ve no doubt seen announcements (either via customer emails, on the Cadence website, on the Cadence Customer Support portal, etc.) about Quarterly Incremental Releases (QiRs). QiRs have been made available for over a year now with a focus on updates to the 16.6 release. In case you’re...
    Posted to PCB Design (Weblog) by Jerry GenPart on Tue, Feb 11 2014
  • PAD_DEF output in 16.6 ISR22

    I have just installed IRS 22 for 16.6 and now have problems with the Valor ODB++ output, there is a new field in the standard output which seems to stop this working. PAD_STACK_CATEGORY. Does anybody know if you can use the extracta commond to control how much of the pad information is output.
    Posted to PCB Design (Forum) by Roger G on Mon, Feb 10 2014
  • Re: Radial/polar placement !

    To place component as you desire, I tried "Import > Placement" command I calculated coordinates X and Y, setting: a RADIUS value (I used mils for the distance from origin), an ANGLE (degrees between a symbol and the next one), an initial PHASE (degrees, you may want to place the first symbol...
    Posted to PCB Design (Forum) by Alicia on Tue, Feb 4 2014
  • What's Good About Allegro PCB Editor CM Analysis Control? 16.6 Has a Few New Enhancements!

    Beginning with the 16.6 version of Allegro PCB Editor , you can now toggle the Analysis flag directly from the Constraint Manager (CM) column header without using the “Analysis Modes” dialog. Read on for more details … The Constraint Manager column’s header is colored in yellow...
    Posted to PCB Design (Weblog) by Jerry GenPart on Mon, Feb 3 2014
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